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LMX2492EVM: LMX2492 read back got wrong value.

May 25, 2017, 1:45 pm
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Part Number:LMX2492EVM

Hi:

I use my chip SPI I/F to connect LMX2492. At first, I wrote a bunch of data to make PLL lock. After PLL locked, I tried to read some registers back.

Before reading, I configured TRIG1 pin as my SPI mosi. According to the datasheet, I set R36 [2:0]=10 and R35[3]=0, R36[3:7]=0111. Then I read some registers. I can read every registers, but all registers value are wrong. Is my setting correct?

I also tested USB2ANY + LMX2492 EVM + TICS Pro with the same way. I tried TRIG1, TRIG2, MOD and MUXout pins. Every registers read back 0x00. How can I read correct register value using TICS pro?

Thanks

Jimmy

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Linux/DM3730: maximum serial baud rate

May 25, 2017, 1:51 pm
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Part Number:DM3730

Tool/software: Linux

Hello,

I try to find the maximum baud rate of serial port in TRM , but couldn't find it.

1. What the maximum baud rate ?

2. Can the interface be configured according to the device that is used, i.e. detect rate and change rate accordingly ?

Thank you!
Ran

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DP83867CS: Use as a media converter in default setup.

May 25, 2017, 1:51 pm
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Part Number:DP83867CS

Hey E2E,

I'm wondering if it is possible to use this PHY as an optical media converter (1 GigE) from an RJ-45 4 diff pair connection to SGMII. I've scoured the datasheet and I believe that every setting I need can be enabled with hardware straps but I want to double check that I can run this chip with defaults. I don't want to have to program through MDIO and after looking at all the registers I don't think I need to. Thanks for any help you guys and gals at TI can provide.

Best Regards,

Nick

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EVMK2EX: How to Boot u-boot from a TFTP setver

May 25, 2017, 1:51 pm
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Part Number:EVMK2EX

 Can the EVMK2E dev board run u-boot that it loads from a TFTP server. or dose it need to be local. If so how do you  set that up?

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Linux/AM3358: KSZ9897 Linux driver for AM335x

May 25, 2017, 1:57 pm
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Part Number:AM3358

Tool/software: Linux

LK"I


Hi,

I'm using a Sitara (AM335x) based linux board.

How Do i integrate the KSZ9897 linux driver into my linux kernel? (for instance the Starter Kit Kernel)


KSZ9897 Driver:

github.com/.../UNG8071

Harel


Harel

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IWR1443: mmWave sensing Estimate issue

May 25, 2017, 1:57 pm
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Part Number:IWR1443

Is mmWave sensing estimator free tool? Does it have to connect to the hardware to make it work? I try it and put some inputs, but no output, why?

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TPS63050: Startup/soft-start problem

May 25, 2017, 2:02 pm
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Part Number:TPS63050

Hi!

I have a problem with the TPS63050 converter IC. At startup the input voltage is 3,6V and the output voltage stays very low (400-500mV) for a long period of time (10-30sec). Meanwhile the voltage measured on the soft start capacitor increases very slowly up to 1,3V. After this point the output voltage jumps up to the desired 3,3V - and little bit above, because the converter operates always in PFM mode. There is a 10uF cap on the input and 20uF on the output.

I made test with no load, and a 33ohm load resistor for 100mA constant current, but the result is the same: Low output voltage while the SS capacitor is below 1,3V. Also I have assembled two custom board, the result is the same on both board.

My question is why does it take so long time to charge up the SS capacitor to 1,3V?

On a third board where I assembled the complete project, not just the DC/DC converter, this phenomena is vanished. I hope this is not a miracle, and maybe it's related to the overall capacitance on the output of the TPS63050?!

Thank you and best regards,

Levente

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MSP430F5528: Cannot enable jtag interface

May 25, 2017, 2:04 pm
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Part Number:MSP430F5528

Hello, 

I am trying to program msp430f5528 with MSP-fet430UIF or MSP-FETFlashEmulation Tool (I have both)

and it is keep giving me that "unknown device" error. 

I have designed my board based on Invensense CA-SDK which also uses msp430f5528 and debugging works on that board. 

I attached my design. 

I read the datasheet for msp430 jtag interface (link below) and it seems like there is some initialization to enable jtag access.

www.ti.com/.../slau320x.pdf

Do I externally need to set test pin high and reset low? 

Or, if you see any mistake on my schematic, could you give me any recommendation ?

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Linux/TMS320DM8168: Is it possible to program flash from MLO ?

May 25, 2017, 2:10 pm
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Part Number:TMS320DM8168

Tool/software: Linux

Hello,

Usually on all TI's OMAP's processor we prgram flash from u-boot, ( not MLO).

I want to ask if it is possible to program flash from u-boot ?

Thanks,

Ran

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RTOS/CC3220MOD: Cloud OTA keeps failing when trying to reach the server

May 25, 2017, 2:16 pm
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Part Number:CC3220MOD

Tool/software:TI-RTOS

I am trying to get the cloud OTA update working on the CC3220MODSF. I have the profiling working, and I can connect to the station and pass the ping tests. When I start the OTA update, I get to the point where I look to the cloud server. I keep getting the error OTA_RUN_STATUS_CONTINUE_WARNING_FAILED_CONNECT_FILE_SERVER returned back, but I have no clue what I am doing wrong. I followed the instructions listed in SWRA510.pdf, but I still get stuck at this error. Can someone help guide me through this issue? I am guessing I am missing something obvious, but I don't see it at this point. If I find a solution I will come back to update.

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66AK2L06: Using 66AK2L06 on bare metal

May 25, 2017, 2:19 pm
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Part Number:66AK2L06

I plan to use 66AK2L06 for a strictly real time without any operating systems. Just metal bare.
Is there a SDK for 66AK2L06, by analogy like TivaWare?
By and large I want to use 66AK2L06 as a very fast multicore microcontroller, which still performs calculations on DSP cores.

--
With best regards, Sergey Sklyarov.

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CCS/TMS320F28375D: Memory Display EMIF and External SDRAM

May 25, 2017, 2:21 pm
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Part Number:TMS320F28375D

Tool/software: Code Composer Studio

Will the code composer memory window properly read and write memory to external SDRAM through EMIF in the memory window?  ie: if I write a value to 0x80000000 will it write/read the data to the External SDRAM properly?  Or can I only access external SDRAM through proper coding?

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Linux/DM3730: MMU initalization

May 25, 2017, 2:21 pm
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Part Number:DM3730

Tool/software: Linux

Hello,

Is it possible to protect different areas (flash, ram, etc) using MMU management ?

Is there any assembly code for dm3730 which can be used for this purpose ?

Regards,

Ran

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AWR1443: Drone Vibration Interference with Material Detection Application

May 25, 2017, 2:26 pm
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Part Number:AWR1443

In reference to the Drone Ground vs. Water Detection demo video available here: https://www.youtube.com/watch?v=7YJ1dv5gPys

Wouldn't the drone vibrate enough to make the signal coming from the sensor unusable for this kind of application?

How can you filter in a simple way the vibration and movement from the motors? I doubt filtering with the data from the IMU would work.

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Linux/WL1801MOD: Passive Scan functionality verification

May 25, 2017, 2:28 pm
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Part Number:WL1801MOD

Tool/software: Linux

How can we test the passive scan functionality? My customer is trying to check the passive scan and not being able to see it work. 

I asked them to modify the wpa_supplicant.conf to hard code the passive scan setting but they dont seem to be able to get it working. 

Any suggestions? How is passive scan tested?

I try it again by adding passive_scan=0 in wpa_supplicant.conf file, still not work.

ctrl_interface=/var/run/wpa_supplicant

ap_scan=1

passive_scan=0

fast_reauth=1

filter_ssids=1

network={

    key_mgmt=WPA-PSK

    ssid="fb53e249f7028f8859135e8ee70ef1cc"

    psk="I0d91c32b9718c0126b6123b83b4ac56c"

}

 

See below result, wpa_supplicant is failed to start:

 

# wpa_supplicant -W -B -Dnl80211 -iwlan0 -c /tmp/wpa_supplicant.conf

Successfully initialized wpa_supplicant

Line 3: unknown global field 'passive_scan=0'.

Line 3: Invalid configuration line 'passive_scan=0'.

Failed to read or parse configuration '/tmp/wpa_supplicant.conf'.

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AWR1642: I could not setup AWR1642EVM through mode.

May 25, 2017, 2:35 pm
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Part Number:AWR1642

I'd like to set AWR1642EVM to use under combination of BoostPack+DevPack+TSW1400. I got advice below...

• you will find AWR16xx firmware binary at ‘mmwave_dfp_00.06.01.01\firmware\mss\ar16xx’ which you can use with RadarStudio to send CMD over SPI.
• When you are using RadarStudio with AWR16xx you need download only BSS and MSS binaries in SOP2 mode, no need to download config file.
• AWR16xx firmware provided in this DFP 00.06.01.01 version can be used only in SOP-2 mode.
• With AWR16xx you need to use ‘ar1xxx_bss_rprc.bin’ fw file to download to the device from ‘mmwave_dfp_00.06.01.01\firmware\bss’ path.
• On AWR1443 this version of DFP won’t work, you need to use DFP 00.06.00.05 version.

But I could not flash ‘ar1xxx_bss_rprc.bin’ file to AWR1642EVM as below.

***Uniflash log ***

[2017/5/26 3:30:58] [INFO] CortexR4_0: Initialization complete.

[2017/5/26 3:30:58] [INFO] CortexR4_0: Flashing process starting...

[2017/5/26 3:30:58] [INFO] CortexR4_0: Connecting to COM Port COM7...

[2017/5/26 3:30:58] [INFO] CortexR4_0: Reset connection to device

[2017/5/26 3:30:59] [INFO] CortexR4_0: Set break signal

[2017/5/26 3:30:59] [INFO] CortexR4_0: Connection to COM port succeeded. Flashing can proceed.

[2017/5/26 3:30:59] [INFO] CortexR4_0: Reading device version info...

[2017/5/26 3:30:59] [INFO] CortexR4_0: ** 2 files specified for flashing.

[2017/5/26 3:30:59] [INFO] CortexR4_0: Checking file C:/ti/mmwave_dfp_00.06.01.01/firmware/bss/ar1xxx_bss_rprc.bin for correct header for AWR1642.

[2017/5/26 3:31:00] [INFO] CortexR4_0: Header of C:/ti/mmwave_dfp_00.06.01.01/firmware/bss/ar1xxx_bss_rprc.bin file indicates it is not a valid file to flash to AWR1642: 0x43525052

[2017/5/26 3:31:00] [ERROR] CortexR4_0: !!! Aborting flashing of specified files!!!

[2017/5/26 3:31:00] [INFO] CortexR4_0: Disconnecting from device on COM port COM7...

[2017/5/26 3:31:00] [INFO] CortexR4_0: Flashing instance clean-up initiated...

[2017/5/26 3:31:00] [INFO] CortexR4_0: Instance deinitialized!

************

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TMS320C6678: PCIe Data Space Limitation

May 25, 2017, 2:53 pm
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Part Number:TMS320C6678

Hi,

     Our C6678 is configured as EP and we would like to access more than 256MB on the RC side. Is there a way to do so without changing the OB_OFFSET_INDEX register values? If I would like to send MSI interrupts, am I forced to use an outbound translation window (i.e. within address range 0x60000000 - 0x6FFFFFFF) to write MSI_DATA to the RC's IRQ register?

Best Regards,

Johnny

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DRV595: Question regarding differential input

May 25, 2017, 3:11 pm
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Part Number:DRV595

I am using DRV595 now to provide a DC ouput to drive a DC fan. I have a DC input voltage as reference. Since I saw it was differential input, I have the IN- potential to be 0V. However, I see in some places in the datasheet that it has to have 3V bias, so will my circuit work when I tie IN- to GND? If it is wrong, I hope to salvage this prototype. My circuit has 3.3V source as well. Will it be okay to tie IN- to 3.3V instead of exact 3V?

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TMS320F28377S: Multiple SOC, channels, interrupts, and trigger source problem

May 25, 2017, 3:19 pm
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Part Number:TMS320F28377S

Hello TI community,

Currently I am able to get convert two different ADC pins/channels with SOC0 using EPwm1 generating SOCA on each period. I am able to fill two separate arrays, one array per channel (A2 and B2), using an interrupt based on end of conversions on SOCA. I am currently trying to implement a third ADC channel with it's own trigger source and interrupt routine. I am trying to use EPwm3 as the SOCA trigger source and the SOC1 module. After trying to debug, I gave up and bit and commented out some things. I am able to get EPwm3 to generate SOCA for pin ADCINB0 when I have the following code (using SOC0).

EALLOW;
PieVectTable.ADCB1_INT = &generic_isr_2;
EDIS;

config_ADC(ADC[ADC_ADCB], ADC_ADCB);
config_EPwm_SOCA(ePWM[3]);
setup_ADC_SOC0(0, ADC[ADC_ADCB], 9);
setup_ADC_INT_TRIG(ADC[ADC_ADCB], 0);

IER |= M_INT1;
PieCtrlRegs.PIEIER1.bit.INTx2 = 1;

EINT;
ERTM;

//--Interrupts--//

interrupt void generic_isr_2(void)
{
    adc_sample_buffer[bufferIndex] = AdcbResultRegs.ADCRESULT0;   // test buffer to hold the dc value of the battery
    bufferIndex++;
    if(ADC_BUF_LEN <= bufferIndex)
    {
        bufferIndex = 0;
        bufferFull = 1;
    }

    AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;
    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
}

//--Functions--//

// config_ADC - Write ADC configurations and power up the ADC
void config_ADC(volatile struct ADC_REGS *ADC, Uint16 adc)
{
    EALLOW;

    //write configurations
    (*ADC).ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4       maximum speed of ADCCLK is 50 Mhz = 200 MHz/4
    AdcSetMode(adc, ADC_RESOLUTION_16BIT, ADC_SIGNALMODE_DIFFERENTIAL);

    //Set pulse positions to late
    (*ADC).ADCCTL1.bit.INTPULSEPOS = 1;

    //power up the ADC
    (*ADC).ADCCTL1.bit.ADCPWDNZ = 1;

    //delay for 1ms to allow ADC time to power up
    DELAY_US(1000);

    EDIS;
}
// config_EPwm_SOCA to generate event on SOCA
void config_EPwm_SOCA(volatile struct EPWM_REGS *ePWM)
{
    EALLOW;
    // the counter clk, TBCLK, is calculated by the following: "TBCLK = EPWMCLK / (HSPCLKDIV * CLKDIV)"
    // EPWMCLK should be equal to SYSCLK/2 which is 100 MHz
    (*ePWM).TBCTL.bit.CLKDIV = 0;                 // configures the divider to /1
    (*ePWM).TBCTL.bit.HSPCLKDIV = 0;              // configures the high speed divider to /1
    // Assumes ePWM clock is already enabled
    (*ePWM).ETSEL.bit.SOCAEN = 0;                 // Disable SOC on A group
    (*ePWM).ETSEL.bit.SOCASEL = 4;                // Select SOC on up-count
    (*ePWM).ETPS.bit.SOCAPRD = 1;                 // Generate pulse on 1st event
    //EPwm1Regs.CMPA.bit.CMPA = 195;                // Generate event on CMPA value     // not necessary
    (*ePWM).TBPRD = 194;                          // TBPRD = EPWM Period value - 1
    (*ePWM).TBCTL.bit.CTRMODE = TB_FREEZE;        // freeze counter
    EDIS;
}

void setup_ADC_SOC0(Uint16 adc_channel, volatile struct ADC_REGS *ADC, Uint16 trigger)
{
    Uint16 acqps;

    //determine minimum acquisition window (in SYSCLKS) based on resolution
    if(ADC_RESOLUTION_12BIT == (*ADC).ADCCTL2.bit.RESOLUTION)
    {
        acqps = 14; //75ns
    }
    else //resolution is 16-bit
    {
        acqps = 63; //320ns
    }

    EALLOW;
    (*ADC).ADCSOC0CTL.bit.CHSEL = adc_channel;    //SOCx will convert selected adc_channel of chosen ADC
    (*ADC).ADCSOC0CTL.bit.ACQPS = acqps;          //sample window is 100 SYSCLK cycles
    (*ADC).ADCSOC0CTL.bit.TRIGSEL = trigger;//5;            //trigger
    EDIS;
}

void setup_ADC_INT_TRIG(volatile struct ADC_REGS *ADC, Uint16 end_of_conversion)
{
    EALLOW;
    (*ADC).ADCINTSEL1N2.bit.INT1SEL = end_of_conversion;            // EOCx will set INT1 flag of chosen ADC
    (*ADC).ADCINTSEL1N2.bit.INT1E = 1;                              //enable INT1 flag
    (*ADC).ADCINTFLGCLR.bit.ADCINT1 = 1;                            //make sure INT1 flag is cleared
    EDIS;
}

When I change the SOC0 to be SOC1, it stops working - does anyone have an idea of how to fix this or is my understanding of what SOC0 and SOC1 differences incorrect?

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RTOS/PROCESSOR-SDK-K2G: Build IPC ex02_messageq example in CCS7

May 25, 2017, 3:23 pm
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Part Number:PROCESSOR-SDK-K2G

Tool/software:TI-RTOS

pdk_k2g_1_0_5 is installed in default directory.


I followed the readme.txt in C:\ti\ipc_3_44_01_01\examples
and built
C:\ti\ipc_3_44_01_01\examples\66AK2G_bios_elf\ex02_messageq for both host(ARM) and core0(DSP)
without any issues.
Then, Loaded both .out files into CCS and run on K2G EVM successfully. The messages are observed in RTOS Object View in CCS.

Since my other developments are in CCS I really need to build ex02_messageq example in CCS on windows.

I found this link which talks about the similar issue:
e2e.ti.com/.../443667 ipc in ccs

I try to follow the changes mentioned in this link but it is not exactly for IPC example code. The link talks about add all the memory regions in package.bld from example to customized platform. But my K2G example code the memory region is in
C:\ti\ipc_3_44_01_01\examples\66AK2G_bios_elf\ex02_messageq\shared\config.bld

Anyway, I used the platform wizard and defined a custom platform based of K2G memory map in
 order to add all the memory regions from example code's config.bld
to package.bld in my customized platform.

I am getting the following error when I try to build:

**** Build of configuration Debug for project My_messageQ_evmK2G_c66x ****

"C:\\ti\\ccsv7\\utils\\bin\\gmake" -k -j 32 all -O
'Building file: ../My_mQ.cfg'
'Invoking: XDCtools'
"C:/ti/xdctools_3_32_01_22_core/xs" --xdcpath="C:/ti/bios_6_46_04_53/packages;C:/ti/pdk_k2g_1_0_5/packages;C:/ti/edma3_lld_2_12_03_27/packages;C:/ti/ipc_3_44_01_01/packages;C:/ti/ndk_2_25_01_11/packages;C:/ti/uia_2_00_06_52/packages;C:/ti/ccsv7/ccs_base;C:/Users/sjw/ti/myRepository/platforms;" xdc.tools.configuro -o configPkg -t ti.targets.elf.C66 -p myK2gEvm256MBddr3 -r debug -c "C:/ti/ccsv7/tools/compiler/ti-cgt-c6000_8.1.2" "../My_mQ.cfg"
making package.mak (because of package.bld) ...
generating interfaces for package configPkg (because package/package.xdc.inc is older than package.xdc) ...
configuring My_mQ.xe66 from package/cfg/My_mQ_pe66.cfg ...
subdir_rules.mk:19: recipe for target 'build-1777438783-inproc' failed
js: "C:/Users/sjw/workspace_v7/My_messageQ_evmK2G_c66x/ipc.cfg.xs", line 115: TypeError: Cannot read property "base" from undefined (C:/Users/sjw/workspace_v7/My_messageQ_evmK2G_c66x/ipc.cfg.xs#115)
    "C:/Users/sjw/workspace_v7/My_messageQ_evmK2G_c66x/My_mQ.cfg", line 144
    "./package/cfg/My_mQ_pe66.cfg", line 188
gmake.exe: *** [package/cfg/My_mQ_pe66.xdl] Error 1
js: "C:/ti/xdctools_3_32_01_22_core/packages/xdc/tools/Cmdr.xs", line 52: Error: xdc.tools.configuro: configuration failed due to earlier errors (status = 2); 'linker.cmd' deleted.
gmake[1]: *** [build-1777438783-inproc] Error 1
gmake: *** [build-1777438783] Error 2
subdir_rules.mk:16: recipe for target 'build-1777438783' failed
gmake: Target 'all' not remade because of errors.

**** Build Finished ****

Both auto-generated config.bld and package.bld under /Debug/configPkg/ don't have the memory region I added in my custom platform. Am I doing something wrong here?

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