Part Number:AM3358
Hello,
I have a board (we designed) using SPI 0 only with 4 slave devices on it and using the AM3358 as the single master. Since there are only 2 chip selects pinned out on the AM3358 (omap3), we need to control the chip selects by gpios. We are doing this with some success, but some problems. Note that we are using QNX, but my question is regarding register settings in the AM3358 (not QNX code directly)
My questions are:
1) Can the AM3358 McSPI work with multiple slaves (single master) when using gpios to control the chip selects (AM3358 is not controlling chip selects)? The reference manual seems to indicate not:
"24.3.1.3.2 Programmable SPI Enable Generation
McSPI is able to generate or not generate SPI enable. If management of chip select is de-asserted, a
point-to-point connection is mandatory. Only a single master of a slave device can be connected to the
SPI bus."
(I am assuming here that "management of chip select is de-asserted" means setting MCSPI_MODULCTRL[PIN34]=1 (see below). Is that correct?)
"24.3.2.12 3- or 4-Pin Mode
External SPI bus interface can be configured to use a restricted set of pins using the bit field
MCSPI_MODULCTRL[PIN34] and depending on targeted application:
• If MCSPI_MODULCTRL[PIN34] is cleared to 0 (default value) the controller is in 4-pin mode using the
SPI pins SPICLK, SOMI, SIMO and chip enable CS.
• If MCSPI_MODULCTRL[PIN34] is set to 1 the controller is in 3-pin mode using the SPI pins SPICLK,
SOMI and SIMO.
In 3-pin mode it is mandatory to put the controller in single channel master mode
(MCSPI_MODULCTRL[SINGLE] asserted) and to connect only one SPI device on the bus."
2) What registers do we need to set (if any) to indicate (to the AM3358) that we are using gpios to control chip selects (AM3358 not controlling chip selects)?
From section 24.3.2.12 above, it seems we should be setting MCSPI_MODULCTRL[PIN34] to 1. Should MCSPI_MODULCTRL[SINGLE] be set to 0 or 1?
3) When using gpios to control chip selects (AM3358 not controlling chip selects), do we need to set/clear MCSPI_CHxCONF[FORCE] to start the transaction? The reference manual seems to indicate we do not need to:
"24.3.2.12 3- or 4-Pin Mode
...
In 3-pin mode all options related to chip select management are useless:
• MCSPI_CHxCONF[EPOL]
• MCSPI_CHxCONF[TCS0]
• MCSPI_CHxCONF[FORCE]
The chip select pin SPIEN is forced to ‘0’ in this mode."
We have found empirically that we do need to set/clear MCSPI_CHxCONF[FORCE] (though we think we shouldn't have to).
Here is some more about what I have done and found (all when controlling chip selects by gpios):
- with MCSPI_MODULCTRL[PIN34]=0 and MCSPI_MODULCTRL[SINGLE]=1 all 4 channels of the McSPI seem to work fine in non-DMA mode. In DMA mode though, only channel 1 works. In DMA mode on channels other than 1, I see the chip select but no clock.
- with MCSPI_MODULCTRL[PIN34]=1 and MCSPI_MODULCTRL[SINGLE]=1 none of the channels work.
- with MCSPI_MODULCTRL[PIN34]=1 and MCSPI_MODULCTRL[SINGLE]=0 channel 1 works for DMA and non-DMA mode, but other channels do not work. Looking at channel 2 for instance, for non-DMA mode I see the MOSI data, clock and chip select work properly, but the data is not correctly returned on MISO (and I notice the AM3358 never stops putting out the clock and data, after the chip select is deasserted). For DMA mode on channel 2, I see only the chip select toggling.
Thanks,
Tim