Part Number:TPS61175
Hi,
Do you have any data/information on the maximu shutdown current (Isd) dependency over input voltage(Vin)?
The datasheet specifies the max shutdown current as 1.5uA under the condition of Vin = 3.6V.If you
I guess if Vin increase, this shutdown current also increase. Do you have any data and/or information?
Specially, it's helpful if you have data for 7V, 8V range.
Thanks,
Ken
Part Number:AFE4403
Hello,
Customer wants to make minimum use of LED by PDNCYCLE, but LED is not controlled with AFE4403EVM test.
Is PDNCYCLE able to make power down only internal block except LED?
So, customer wants to make LED ON only during LED가 ADC capturing by using CONTROL2 PDNTX bit ON/OFF.
At this time, Ramp Up time is not needed or need min. 50us delay as below in datasheet?
Datasheet : TI recommends setting t1 > 50 μs and t2 > 200 μs in order to ensure sufficient time for the shutdown blocks to recover from power-down
And could you recommend delay time for accurate data acquisition below each condition.
1. PDNTX bit on/off ==> ??
2. PDNTX/PDXRX on/off ==> ??
3. PDNAFE on/off ==> more than 1s (in 7.7 Timing Requirements: Supply Ramp and Power-Down)
Regards,
Nicky
Part Number:LM5165
Hi,
The output ripple is confirmed with the attached circuit. (COT control)
When the resistance of the output capacitor is 1.5 Ω, it becomes normal ripple.
If it is 1.2 Ω, the ripple may be small.
Is this because the ripple is so small that the COT control can not be performed normally?
Or is there no problem with small ripple?
Best Regards,
Part Number:SN75DP130
Hi Team,
Please advise on the package information of the SN75DP130SS and DS.
SN75DP130 shows two package drawings on Page49/50 and Page 51/52.
Both are identical except the size of DAP.
The drawing on Page 49/50 has small size DAP (4.1 x 4.1 mm) and one
on page 51/52 has large DAP (5.6 x 5.5)
Please let me know if drawing on page 49/50 corresponds to SN75DP130DS
and one on page 51/52 linked to SN75DP130SS?
Does SN75DP130SS has larger DAP?
Mita
Part Number:PROCESSOR-SDK-AM335X
Tool/software: Linux
Hi everyone,
Our customer is facing a issue about Capacitive Touch IC, They use AM335x with TI SDK 7.0.
This touch IC use I2C interface and require a gpio interrupt pin.
We set the device tree base on Capacitive Touch setting in AM437x-gp-evm.dts, just change the gpio pin for customer used.
However, the interrupt pin does not trigger while touch the panel.
The scope can catch the trigger signal of the interrupt pin, but system can not get this interrupt.
Below is the device tree setting, is anything wrong for this?
PinMux:
pixcir_ts_pins: pixcir_ts_pins {
pinctrl-single,pins = <
0x78 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_be1n.gpio1_28 */
>;
};
Function:
pixcir_ts@38 {
compatible = "pixcir,pixcir_tangoc";
pinctrl-names = "default";
pinctrl-0 = <&pixcir_ts_pins>;
reg = <0x38>; /* refer to datasheet */
interrupt-parent = <&gpio1>;
interrupts = <28 0>;
attb-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
x-size = <1280>;
y-size = <768>;
};
Best Regards,
Wayne Kuo
Part Number:SN65HVD1040
hi,
my customer T... need some help regarding the wake up feature.
In my current project (consisting of several battery-driven modules), I would like to enable the system or the modules via CAN bus, so I selected the TI CAN transceiver (SD65HVD1040). In this regard I have the following questions, which are unclear to me and ask you or your CAN Expert colleagues for clarification:
- According to the datasheet, a dominant bit is longer than 5 us on the CAN bus,
can a CAN subscriber from the standby mode be awakened by the fact that this dominant bit is perceived by the receiving part of the CAN transceiver, and the transceiver can wake up.
My question is: all stations which are on the CAN bus in standby mode will wake up?
- Two CAN subscribers communicate with each other, and another subscriber is in the standby mode, which happens when a dominant bit (or a sequence thereof) occurs through this communication, in total is longer than 5 μs, this means that the CAN subscriber , Which is in the standby mode, in this case will awakened also?
- Please provide a brief description of all possible scenarios
regards,
kamal
Tool/software: Linux
Hi Experts,
I have a custom k2l board which runs both arm linux and dsp files. Now some issues bothers me a lot .
a . When I run dsp with Jtag or mpmcl tools , In arm side linux debug uart goes mad outputing messy code. It happens every time.
b. While Dsp is running with some binaries using DDR, it seems to have an negtive impact on ARM linux side that the kernel will always output crash logs like
UBIFS error (pid 1853): try_read_node: cannot read node type 1 from LEB 15:22368, error -74
[ 135.178936] UBI warning: ubi_io_read: error -74 (ECC error) while reading 2378 bytes from PEB 72:30560, read only 2378 bytes, retry
[ 135.179705] UBI warning: ubi_io_read: error -74 (ECC error) while reading 2378 bytes from PEB 72:30560, read only 2378 bytes, retry
[ 135.180450] UBI warning: ubi_io_read: error -74 (ECC error) while reading 2378 bytes from PEB 72:30560, read only 2378 bytes, retry
[ 135.181170] UBI error: ubi_io_read: error -74 (ECC error) while reading 2378 bytes from PEB 72:30560, read 2378 bytes
[ 135.181173] CPU: 0 PID: 1853 Comm: dmesg Not tainted 3.10.61-00009-g80534c6-dirty #61
[ 135.181181] [<c0015940>] (unwind_backtrace+0x0/0xf8) from [<c0011abc>] (show_stack+0x10/0x14)
Then kernel will not be able to boot up next time.
By the way , I think I've separate ARM-DDR and DSP-DDR well . ARM uses first 512M and DSP uses last 1536M.
my envionment:
*uboot 2013.01 2GB-DDR 1GB -NAND mem_reserve 1536M
*kernel k2l-evm 3.10.61-00090-g80534c6-dirty
Any advise on these?
Thanks!
Part Number:BQ76920
Hello,
We are using the BQ76920 in a 4-cell LiFePo4 Battery-System and in general it works very smoothly
But now I've now come across 2 battery's where the cell-voltage measurement is so far off, that it startet to affect our balancing.
In times it was a little more off than what the datasheet defines as maximum (50mV) even though the temperature is approc 22°C and the measurement should be more accurate. The main Problem is, that one cell is off with +50mA and the other with -50mA with leads to an error of total 100mV in regards to the balancing criterias.
| Time/SoC | Mulitmeter | BQ | Difference | |||||||||
| Cell1 | Cell2 | Cell3 | Cell4 | Cell1 | Cell2 | Cell3 | Cell4 | Cell1 | Cell2 | Cell3 | Cell4 | |
| 13:10 / 99 | 3.511 | 3.575 | 3.487 | 3.575 | 3.541 | 3.541 | 3.541 | 3.524 | -0.03 | 0.034 | -0.054 | 0.051 |
| 14:30 / 34 | 3.267 | 3.262 | 3.272 | 3.268 | 3.283 | 3.25 | 3.299 | 3.244 | -0.016 | 0.012 | -0.027 | 0.024 |
| 15:36 / 6 | 3.229 | 3.229 | 3.232 | 3.228 | 3.25 | 3.223 | 3.263 | 3.212 | -0.021 | 0.006 | -0.031 | 0.016 |
| 16:15 / - | 3.31 | 3.31 | 3.311 | 3.309 | 3.335 | 3.33 | 3.346 | 3.286 | -0.025 | -0.02 | -0.035 | 0.023 |
When I did a cycle with the battery (after the cells were individually fully charged) I got the following result:
Since the cells are all equally charged, they should all roughly follow the same line, but because of the measurement-error they are running in parallel.
We are now working on a solution to calibrate the voltage-measurement on a single cell-level with an offset when the battery is assembled.
I've also seen the method in the datasheet to improve accuracy, but since the total pack-voltage is ok, it would not have a big enough impact to improve the accuracy of the cells.
In general I would like to check if there are any errors within our schematic? I also noticed, that there is a voltage-drop of approx. the measurement error over the resistors R113-R116. There was no current and the balancing was inactive a the time. Is this voltage-drop, positive and negative depending on the measurement-error, normal?
Now that I started looking I also noticed those voltage drops on all batterys.
Thank you for any feedback.
Best regards,
Cedric
Part Number:CC2650EM-7ID-RD
Tool/software: Code Composer Studio
Development Environment
Windows 7
SmartRF06 Evaluation Board
Code Composer Studio v7
Flash Programmer 2
CC2650EM-7ID
I am making changes inside project zero to work on my application. I went for project zero because it already has UART Logging enabled. I created a service using texas instruments plugin involving Bluetooth Developer studio. Things were working fine (Logging, Debugging )upto the point when I decide to write 1024 bytes to flash using SNV area described in Developers guide for cc2640 and cc2650. I got an error which i dont remeber now. Than i decided to Mass erase EM module using Flash programmer 2. It failed as well
Again after hitting a debug button on CCS v7 I am getting the following error
"IcePick_C: Error connecting to the target: (Error -100 @ 0x0) The controller or software detected an error with an unknown cause. This error number is used when detailed information is not available. (Emulation package 6.0.504.1) "
A dialog box appears "Unable to connect to the target device"
In the stack project under TargetConfig > CC2650F128.ccxml, the selected Connection is Texas Instruments XDS100v3 USB debug probe. Selected Device is CC2650F128. When i run Test Connection it passes the test
"The JTAG DR Integrity scan-test has succeeded."
I have two boards and same thing is happening on each of them. I am running Project Zero from start in another workspace and still the problem persists. In Device Manager on Windows the com port 6 has the following details and the driver is upto date
I am stuck at this and no where to move forward and my project is at halt.
Part Number:TPS54821
Hi Team,
I have planned to use TPS54821 in my design for Vin=5-15V and Vout=4.2V/8A.
For this i have tried to do design calculation using design calculator but the available Design calculator excel file on below link is not matching for TPS54821.
Can anyone help me to get the design calculator for TPS54821?
Thanks,
Chithambara Ganesh.
Part Number:CC110L
Tool/software: Code Composer Studio
Hi ,
I've got some booster Pack kits from Anaren : www.anaren.com/.../cc110l-air-module-boosterpack-embedded-antenna-module-anaren
From TI, I found the driver for the TI CC1101: www.ti.com/.../swra493.zip
So, I'm trying to port the CC1101 driver to CC110L, on the MSP430F5529LP
Unfortunately, the driver doesn't work for at it is, and I'm finding difficults to run it on my setup.
Could you please give me the main difference between the two chips (if there's any) ?
What are the modification that I should apply to the code ?
Your help is greatly appreciated!
Best regards,
M. Guermoud
Part Number:TDA2EVM5777
Tool/software: Linux
Hi Guys,
I'm working on TDA2EX EVM board with 4.4 kernel which is part of vision_sdk_02_12.
i'm trying to implement usb uvc gadget using configfs.
EVM board as usb webcam(device) -------------------------> HOST PC.
i have set usb as dr_mode = "otg" in dts file. and passing these parameters
# mount -t debugfs debugfs /mnt/ # echo "device" > /mnt/488d0000/mode # cat /mnt/488d0000/mode OTG # modprobe configfs # modprobe libcomposite # cd /sys/kernel/config/usb_gadget # mkdir g1 # cd g1 # echo "0xA55A" > idVendor # cat idVendor # echo "0x0111" > idProduct # mkdir strings/0x409 # cd strings/ # cd 0x409/ # echo "0123456789" > serialnumber # echo "Xyz Inc." > manufacturer # echo "webcam" > product # cd ../../
# modprobe usb_f_uvc # mkdir functions/uvc.usb0 # mkdir configs/c.1 # mkdir configs/c.1/strings/0x409 # echo "Video" > configs/c.1/strings/0x409/configuration # echo 120 > configs/c.1/MaxPower # mkdir functions/uvc.usb0/control/header/h # cd functions/uvc.usb0/control/ # ln -s header/h class/fs # ln -s header/h class/ss # cd ../../../ # mkdir -p functions/uvc.usb0/streaming/uncompressed/u/360p # cat <<EOF > functions/uvc.usb0/streaming/uncompressed/u/360p/dwFrameInterval > 666666 > 1000000 > 5000000 > EOF # mkdir functions/uvc.usb0/streaming/header/h # cd functions/uvc.usb0/streaming/header/h # ln -s ../../uncompressed/u # cd ../../class/fs # ln -s ../../header/h # cd ../../class/hs # ln -s ../../header/h # cd ../../../control # cd ../../../ # ln -s functions/uvc.usb0 configs/c.1/ # echo "488d0000.usb" > UDC
after these i'm getting these message.
[ 41.557509] configfs-gadget gadget: uvc_function_bind [ 41.592097] dwc3 488d0000.usb: otg: gadget gadget registered
but when i connect device to host PC. i'm not getting any enumeration as expected in usb hotplug device.
In host PC, their is no information whether any usb device connected.
i have posted in TDA2EX ADAS forum of e2e but they inform that they have not tested these that's why i'm posting here in linux community.
if anyone can tell what can be the problem. to confirm USB port is working or not i have tested with usb mass storage which is working fine.
regards,
Ganesh
Hi,
Function SL_SelfTest_PBIST() has the following code which claims that PBIST error would activate nERROR and thus that check is made
/* If nERROR is active then do not proceed with tests that trigger nERROR */
if((boolean)(TRUE) == SL_ESM_nERROR_Active()){
SL_Log_Error(FUNC_ID_ST_PBIST, ERR_TYPE_ENTRY_CON, 2u);
return(retVal);
I couldn't find any sources for ESM nor any mentions in PBIST paragraph in TRM how that could happen. I also generated a code which results to PBIST failure and error pin is not activated
------ Code ------
// use not suitable algo (RAM) for given ROM memories
vClearAndWait_nError();
retVal = SL_SelfTest_PBIST( PBIST_EXECUTE, PBIST_RAMGROUP_01_PBIST_ROM | PBIST_RAMGROUP_02_STC_ROM, PBISTALGO_MARCH13N_RED_1PORT );
if (!retVal)
{
initSTFailCount++;
for(;;)
{
}/* Wait */
}
while (TRUE != SL_SelfTest_WaitCompletion_PBIST());
retVal = SL_SelfTest_Status_PBIST(&failInfoPBIST);
if( (retVal) && (failInfoPBIST.stResult == ST_FAIL) ) {
initSTPassCount++;
} else {
(void)SL_SelfTest_PBIST_StopExec(); // if status returns false, then PBIST is not stopped, stop here just in case
initSTFailCount++;
for(;;)
{
}/* Wait */
}
}
------ Code ends ------
If PBIST doesn't activate nERROR why that function then checks in the entry that nERROR is not active - seems useless and annoying check and is actually a bug?
Part Number:TPS630252
Hi Team:
Just want to confirm with you one question with you.
In real application, customer using TPS630252 and TPS62085 parallel output, they both 5V input and 3.3V output.
The question is that when both chip are working, the TPS62085's output will go to TPS630252's.
Customer want to confirm whether it will damage each other?
If pull the enable pin to low, whether can parallel output together.
Part Number:CC2530
HI,
In ZSTACK 2.5.1a ,I set a device as a end device, and predefine POWER_SAVING.the function osal_pwrmgr_device(PWRMGR_BATTERY) is added after joining network successfully,my consumption is about 50 uA，
but i find the distance between the end device and coordinator is short about 3-4 meters, no PA. and the end device loses its parent easily. why?what settings effect it?
thanks!
Part Number:LM3423-Q1
Hi,
I am considering the following contents, is it possible?
The dimming method is only PWM dimming and analog dimming is not performed.
The width of the minimum PWM H period is 1.5us.
In my opinion, it can be set up to the operating frequency of 2 MHz, so it seems that it can be realized if securing at least 3 pulses (= 1.5 us) of switching pulse.
Although it is contents not described in the data sheet, it must be guaranteed over the entire temperature range.
Best Regards,
Hello
I want to measure a signal within 50mVp-p and with the frequency range between 10KHz to 10MHz.
I decided to measure the signal with two unity gain OPA657 (I mean the 1st stage of instrument Amp). then I connected the signals to a Difference Amplifier (AD8129)
what should I do to have very linear gain in the desired band? I have a medical application and it's very important. Please help me.
it's my email: golhaaa@gmail.com
Regards
Part Number:CC2650
Using TI-MAC 1.5.2 stack.
When a device issues an ASSOCIATION REQUEST to a Coordinator, and the Coordinator replies with status other than MAC_SUCCESS (e.g. MAC_NO_RESOURCES), the device's MAC layer reports an ASSOCIATION CONFIRMATION with the replied status in its header.
When the device re-attempts the ASSOCIATION REQUEST later on (after a few seconds) with the same Coordinator, the device's MAC layer returns an ASSOCIATION CONFIRMATION with header status MAC_NO_DATA - although the Coordinator has replied the same status (MAC_NO_RESOURCES) as before.
It appears that the device's MAC layer is caching some information ??? How can I prevent that?
Part Number:TMS320F28035
I"m searching the documentation how to configure the ADCresult register to fix the order of ADC result . I can't find it how it is done.
I have 5 SOC sources (PWM1-4 and software) 12 ADC results total.
After all the 4 PWMS are triggered I like an interrupt and every 100ms there is a software SOC trigger.
My question: How to get the order in the ADCResult register right with the different trigger sources and timing.
I don't mind if results are overwritten.
Thanks!