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Which SPn_ERR_STAT errors cause SPn_ERR_RATE's ERROR_RATE_CNT bits to increment

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Hi

C6472, DIO lib 1.1.0 DirectIO

Which SPn_ERR_STAT bits cause SPn_ERR_RATE's ERROR_RATE_CNT bits to increment? 

And when the SPn_ERR_THRESH is reached, is that when bit 8 "Error on Port 0"  in ERR_RST_EVNT_ICSR is set?

What happens if its a fatal error (i.e. bit 2 of SPn_ERR_STAT). Is bit 8  "Error on Port 0" of ERR_RST_EVNT_ICSR set immediately?

Cheers2u


Debugger session abruptly failes with Memory Block Error

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Hi,

Very Frequently we are facing the issue in CCS Debugger session in the middle of Module test execution with following Error

[5-4-113 4;25 PM] Loading SW to board
Running CPU: C64XP
SEVERE: C64XP: Trouble Reading Memory Block at 0x29a0100 on Page 0 of Length 0x4: Error 0x00000002/-1139 Error during: Memory,  Device driver: Emulation Connection Loss Detected on Target CPU. It is recommended to RESET EMULATOR.  This will disconnect each  target from the emulator.  The targets should then be power cycled or hard reset followed by an emureset and reconnect to each target.  

SEVERE: C64XP: GEL: Error while executing OnTargetConnect(): target access failed 	at (*((int *) 0x029A0100)&=~(0x00000001)) [DSKTCI6482.gel:243] 	at init_PLL() [DSKTCI6482.gel:45] 	at OnTargetConnect() .

SEVERE: C64XP: Failed Software Reset: Error 0x00000020/-1139 Error during: Execution,  Device driver: Emulation Connection Loss Detected on Target CPU. It is recommended to RESET EMULATOR.  This will disconnect each  target from the emulator.  The targets should then be power cycled or hard reset followed by an emureset and reconnect to each target.  

SEVERE: C64XP: Trouble Halting Target CPU: Error 0x00000020/-2011 Error during: Execution,  An internal error occurred in which an illegal action (0x00000000) was requested while disconnected.  
Module Test will be running all fine but suddenly while loading the *.out image to EVM board we get above error; any help regarding this will be highly appreciated.
Best Regards,
Raju.

Running Target in Synchronous Mode through DSS utility

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Hi,

We have bit complex CI set up and we using DSS utility provided by TI for automation our Module test cases; as a pre-requisite we expect the required *.out file to be loaded to EVM board and run in synchronous mode and below is the piece of code that we use

debugSession.target.connect();
debugSession.memory.loadProgram(this.binaryFile);
debugSession.target.run();
debugSession.terminate();
// Start MT execution

 

The issue we have here is once we start Target in synchronous mode (debugSession.target.run();) the control is returned to next line the script which is blocking the MT executoin; any idea how do we resolve this? unfortunately we cant run target in asynchronous mode as all our Module tests are failing (not sure why)

Thanks

Raju.

Extended Pattern Sequence - More than 96 images

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Hi - I'm working on the extended pattern sequence command via a TCP connection.  Everything is working well for me between 2 and 80 images.  I noticed above 80 images I'm starting to receive issues (ex- 81 images or 100 images).  After taking a look at the GUI - I'm noticing that above 80 - the number of images presented in the dropdown selector are in intervals of four: 80, 84, 88, 92, 96.  When I try these numbers - everything uploads and works fine, but again - I can't do 81 or 100 images.  Since the manual says that the extended pattern sequence can take up to 1500 images - I was hoping to display more than 96 images.  To be precise I was looking to sequence 360 images.  Since 360 is divisible by 4 I would think it would work - but I'm receiving an 'failed with unknown error' response when I try to do this.  Please let me know if I'm missing something in order to achieve more images within the pattern sequence.

Thanks so much,

Robbie

querry on RTSP - IPNC

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Hi All,

SW: IPNC V3.2

I am using ipnc sw package with DM814x HW. Wanted to know couple of things listed below.

  1. IPNC uses live555 for streaming the encoded data. What is the packet size of each individual RTSP packets?
  2. Live streamer says it uses G07007 hardware module and divers,  Creates RTSP packets and streams it. Does same concept true in IPNC as well?
  3. I found some rtp/rtsp code in ipnc_app/multimedia/avisave/armffmpeg/libavformat. I want to use this code for some experiment purpose. Basically I neeed to call this from ARM. i.e from src_linux in mcw ti_mcfw_ipcFrames.c file. How to do that?


    Appreciate your help

IMGDEC1_process SIGSEGV help!

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we are using IMGDEC1_process on dm365 with JPEG codec 01.00.00.10 recently and it works fine but once i got the error from cmem:
Unable to handle kernel paging request at virtual address 9d6f9d8a
we are now using a loop-queue to index the buff info. the full log is as follow:
 
[0m[37;40m10:43:36|trace CMediaFileList::onTimerOnEventNotify::event notify
[mTime : Thu Apr 25 10:43:36 2013
=========================== TRACE START ===================================
Tid:413, Exception type : SIGSEGV
[0m[33;40m10:43:36|warn  Src/./RtspClient.cpp:685 rtsp connect exception!
[0m[33;40m10:43:36|warn  Src/./RtspClient.cpp:688 return -1
[0m[31;40m10:43:36|error send failed! Connection reset by peer
[0m[31;40m10:43:36|error CStreamSender socket exception! fd: 38
[0m[33;40m10:43:36|warn  Src/./StateMachine.cpp:181:execute exception occured!
[0m[33;40m10:43:36|warn  Src/./MachineKeeper.cpp:64 
[0m[33;40m10:43:36|warn  Src/./RtspClient.cpp:~CRtspClient client:0x1be2cc0 
PC:[0x00034e48] (0x00034dc0--0x00034e63) stack_sig_hook + [0x88]
Unable to handle kernel paging request at virtual address 9d6f9d8a
PC:[0x401a77c0] (0x00034dc0--0x00034e63) __defaupgd = c203c000
lt_rt_sa_restore[9d6f9d8a] *pgd=00000000r_v2 + [0x0]
PC:[0x00099428] (0
x00034dc0--0x000Internal error: Oops: 1 [#1]
Modules linked in: mmc_drv mmc_blk mmc_core davinci_fm2018 davinci_evm_tlv320 snd_soc_davinci davinci_i2s_mcbsp aout tlv320aic23 dm365_ad h3ak myvdec vpfek pwm vpbek touch_panel_ctrl i2ckey evdev getjif mymemcpy irqk edmak dm365mmap cmemk davinci_emac gpio
CPU: 0
PC is at HeapMem_free+0x40/0xb4 [cmemk]
LR is at 0x1000
pc : [<bf00f184>]    lr : [<00001000>]    Tainted: GF    
sp : c3477d5c  ip : 9d6f9d8a  fp : c3477d6c
r10: 00000000  r9 : 00000001  r8 : c2025828
r7 : bf013d60  r6 : 00000000  r5 : c2025828  r4 : bf013d40
r3 : 00000001  r2 : 00000128  r1 : c7a4b000  r0 : 9d6f9d8a
Flags: Nzcv  IRQs on  FIQs on  Mode SVC_32  Segment user
Control: 5317F
Table: 8203C000  DAC: 00000015
Process VideoDaemon (pid: 397, stack limit = 0xc3476258)
Stack: (0xc3477d5c to 0xc3478000)
7d40:                                                                c2025820 
7d60: c3477dbc c3477d70 bf00fca4 bf00f154 00000000 00000000 bf013d58 c0c7fb20 
7d80: bf013d60 c20257e0 00000000 00000000 c00b59a0 00000008 c0c7fb20 c098a120 
7da0: c0b62618 c04b4ea0 00000000 00000000 c3477dec c3477dc0 c0096738 bf00fb28 
7dc0: 00000000 c0dd2bc0 c0dd2bf4 c0c7fb20 00000000 c04aba40 c04aba48 00000000 
7de0: c3477dfc c3477df0 c0096a00 c0096694 c3477e1c c3477e00 c0092fa8 c00969dc 
7e00: c3476000 00001fff c04aba40 00000018 c3477e4c c3477e20 c004bb64 c0092f40 
7e20: c3477e4c c04aba40 c0527680 c0ab9070 00000000 0000000b 00000000 c3477f50 
7e40: c3477e6c c3477e50 c004d16c c004bae0 c3477e6c 001f24c8 c3477ea0 c3476000 
7e60: c3477e84 c3477e70 c004da04 c004cf2c 00000000 00000009 c3477ebc c3477e88 
7e80: c00588f0 c004d958 c3477fb0 c0527860 c0054d58 c3476000 00000000 c3477fb0 
7ea0: c0034208 c0034208 c3476000 00000000 c3477f9c c3477ec0 c0036dd8 c0058520 
7ec0: c3476000 00000001 c0527860 c3477ed8 00000009 00000000 00000000 00000000 
7ee0: 00000000 0000000a c3477f14 c3477ef8 c0064078 c3477f88 00000000 0000000a 
7f00: bee2ed08 bee2ed08 00000008 00000000 c3477f20 c0063b14 0fb21b40 000013f0 
7f20: c149df21 00000000 00000000 00000000 2215fe7d 000013f8 c0063c24 c034dc38 
7f40: 00000000 00000002 c3477f48 c3477f48 c0527680 c0059610 00000008 1263e33d 
7f60: c3477f88 bee2ed08 00000000 000000a2 c0034208 40024e00 00000000 00000000 
7f80: 000000a2 c0034208 c3476000 00000000 c3477fac c3477fa0 c0037258 c0036d90 
7fa0: 00000000 c3477fb0 c00340ac c003723c fffffdfc bee2ed08 4001f5a4 00000002 
7fc0: 40024e00 00000000 00000000 000000a2 00000000 00000000 40025000 bee2ed1c 
7fe0: 00000000 bee2ecf8 400664f4 40067634 80000010 bee2ed10 03f60001 03f70000 
Backtrace: 
[<bf00f144>] (HeapMem_free+0x0/0xb4 [cmemk]) from [<bf00fca4>] (release+0x18c/0x270 [cmemk])
 r4 = C2025820 
[<bf00fb18>] (release+0x0/0x270 [cmemk]) from [<c0096738>] (__fput+0xb4/0x214)
[<c0096684>] (__fput+0x0/0x214) from [<c0096a00>] (fput+0x34/0x38)
 r8 = 00000000  r7 = C04ABA48  r6 = C04ABA40  r5 = 00000000
 r4 = C0C7FB20 
[<c00969cc>] (fput+0x0/0x38) from [<c0092fa8>] (filp_close+0x78/0x84)
[<c0092f30>] (filp_close+0x0/0x84) from [<c004bb64>] (put_files_struct+0x94/0xe8)
 r6 = 00000018  r5 = C04ABA40  r4 = 00001FFF 
[<c004bad0>] (put_files_struct+0x0/0xe8) from [<c004d16c>] (do_exit+0x250/0xa2c)
[<c004cf1c>] (do_exit+0x0/0xa2c) from [<c004da04>] (sys_exit_group+0x0/0x1c)
[<c004d948>] (do_group_exit+0x0/0xbc) from [<c00588f0>] (get_signal_to_deliver+0x3e0/0x42c)
 r4 = 00000009 
[<c0058510>] (get_signal_to_deliver+0x0/0x42c) from [<c0036dd8>] (do_signal+0x58/0x4ac)
[<c0036d80>] (do_signal+0x0/0x4ac) from [<c0037258>] (do_notify_resume+0x2c/0x30)
[<c003722c>] (do_notify_resume+0x0/0x30) from [<c00340ac>] (work_pending+0x1c/0x20)
Code: 1062e003 e1a0c004 ea000001 e1a0c000 (e5900000) 
 34e63) JPEGDEC_TI_updateState + [0x18]
PC:[0x00084b5c] (0x00034e84--0x00130e0f) IMGDEC1_process + [0x23c]
PC:[0x0007f678] (0x00034e84--0x00130e0f) decode_jpeg + [0x1a4]
PC:[0x00000004] (0x00034e84--0x00130e0f) Unknown<1>Fixing recursive fault but reboot is needed!
[0m[36;40m10:43:37|[libInfra] debug ThreadBody Enter name = [ringTimer], id = 551, prior = N64, stack = 0x473d6e24
 
any idea why it just failed once but all goes fine.
Thanks in advance. 
Regards, Mike.
 
 

GPMC Signaling on Non Multiplexed Address Data 16-Bit Device

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Hello,

I want to connect a 16-Bit device with 12-Bit address to the Beaglebone.

As said in "7.1.3.1 GPMC Signals" http://www.ti.com/lit/ug/spruh73h/spruh73h.pdf chosing the "Non Multiplexed Address Data 16-Bit Device" modus will map the internal used address-bit A1 to the output PIN A0.

Thus I connect A1 (Beaglebone) to A0 (my device) up to A12 (Beaglebone) to A11 (my device). Is this correct?

Best regards


Friedrich

Request Identifying the CC2541F256_Chip_Set problem.

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Request Identifying the CC2541F256_Chip_Set problem.

Within the interrupt occurs in PORT1[2], the ISR routine P1IFG_2=1, and P1IFG_3=1 Register  is set at the same time is a problem occurred.

PORT-1 [0:3] are configured as shown in the figure.

As follows: .

STEP1: the SW0 or SW1 Press -> P1IFG_0 = 1 or P1IFG_1 = 1,  Error No (Set = 1).

STEP2 : SW3 Press -> P1IFG_3 = 1, No Error( Set = 1 ).

STEP3 : SW2 Press -> P1IFG_2 = 1 and  P1IFG_3 = 1, Error simultaneous SET (Set = 1).

STEP4: STEP2 + STEP3 repeat, occurring irregularly.

The problem as described above was confirmed SmartRF05EB(Rev1.8.1.2) Board 2 SET, and My Target Board 5 SET.

all The same phenomenon occurs.

STACK : BLE-CC254x-1.3.1 COMPILER : IAR  8.11.1 OS : Windows-7.

SmartRF05EB S/N : 0X35BC, 0x35DF. CC2541EM S/N : 000418, 000419.

----------------------------------------------------------  My ISR Routine. ---------------------------------------------------------- HAL_ISR_FUNCTION( halKeyPort1Isr, P1INT_VECTOR ) {  HAL_DISABLE_INTERRUPTS();

 uint8  nIFG1 = P1IFG;  uint8   nP1 = P1;  bool  bIntFlag = false;

 if( nIFG1 & BIT0 )  {   m_KeyIntRepeat |= INT_KEY_CODE_SW1;   bIntFlag = true;  }    if( nIFG1 & BIT1 )  {   m_KeyIntRepeat |= INT_KEY_CODE_SW2;   bIntFlag = true;  }    if( nIFG1 & BIT2 )  {   m_KeyIntRepeat |= INT_KEY_CODE_SW3;   bIntFlag = true;  }    if( nIFG1 & BIT3 )  {   m_KeyIntRepeat |= INT_KEY_CODE_SW4;   bIntFlag = true;  }    if( bIntFlag == true )  {   osal_start_timerEx( Hal_TaskID, INT_KEY_REPEAT_EVENT, INT_KEY_REPEAT_VALUE );  }

 P1IFG = 0x00;  P1IF = 0;  HAL_ENABLE_INTERRUPTS(); }

----------------------------------------------------------

 


Can I use UCC28950 IC in phase shifted Full-Bridge converter with bridge rectifier configuration?

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Can I use UCC28950 IC,Green Phase-Shifted Full-Bridge Controller With Synchronous Rectification to drive Phase-Shifted Full-Bridge Converter with bridge rectifier configuration? If yes then how to configure UCC28950 for my requirement. What needs to be done to DELEF, OUTE, OUTF and other associated pins to operate the IC with out synchronous rectification operation.

Error when installing ADT Plugins on CCSv5

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Hi,

We are trying to install the ADT Plugin to the CCSv5. But it gives the following error:

"

Cannot complete the install because one or more required items could not be found.
Software being installed: Android Development Tools 21.1.0.v201302060044-569685 (com.android.ide.eclipse.adt.feature.group 21.1.0.v201302060044-569685)
Missing requirement: Android Development Tools 21.1.0.v201302060044-569685 (com.android.ide.eclipse.adt.feature.group 21.1.0.v201302060044-569685) requires 'org.eclipse.wst.xml.core 0.0.0' but it could not be found"

And moreover once we add the site - " http://download.eclipse.org/releases/galileo". It shows the site is not available.

We have already marked it as Enabled, but still it gives the same error.

Ubuntu release version : 13.04

CCS version                    : 5.3

ADT plugin                       : ADT-21.1.0

Please suggest the resolution.

which tool is mostly suitable for Zigbee based application

RS232 data to an AP using CC3000

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I have a MCU module which collects realtime data from production equipment and send it out using RS232. How can CC3000 help me to elliminate the wires.

BQ24650 6mA discharge current issue

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Hello,
 
I’m using BQ24650 to charge 4 LiFePO4 batteries in series (14.4V) with power supplied by solar PV panel. The MPPSET point is set to 17.2V, according to the PV panel’s spec.
 
Well after much effort the charger now works pretty fine as expected, except when at very low sunlight, the BQ24650 starts draining power from the batteries instead of charging them. The current drained is measured 6mA constantly, the voltage of the PV panel is measured approximately 15V at this time, and current from PV panel is about 2mA or so.
 
However the discharging current will stop when sunlight is completely removed. 
 
How can I eliminate this discharge current? As 6mA power drain is quite undesired. And I suspect the battery detection procedure within the BQ24650 is causing this drainage. Does anyone experiences this same behaviour?
 
Thanks very much if anybody can help me out of this.
 
 

Question about spec of DLP3000 and DLP LightCrafter

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Hello,

I have some questions about DSP3000 and DLP LightCrafter. Could you let me know?

 - How long is the clearance between the micromirror and a next micromirror on DLP3000 ?

 - What video format is supported on HDMI video input mode on DLP LightCrafter? 
   (Only RGB888?)

 - What video resolution is supported on HDMI video input mode on DLP LightCrafter?

Best regards, RY

Camera drivers

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Hai

I'm Sekra

I am using one davinci processor which was running on linux kernel.I had a serious doubt with the kernel drivers

In "Multimedia support" options..........

there is a for camera drivers....Lot of the types were there.....

what is the difference between CAMERA SENSOR DEVICES and SoC CAMERA SUPPORT 

Can anyone could explain it.Does it differ with any of the supporting files.

Because i'm working in one camera device.How to ready the drivers for which compatiple. In that datasheet they show it is SOC camera.But in previous kernel it belongs to CAMERA SENSOR DEVICES.clarify me How to allocate those things????


TAS5706 Audio data verification

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Hi,

How I verify that data is coming to TAS5706 is or not?

What care should be taken for chip initialization and clocking the chip?

How can we set TAS5706 as master codec?

Thanks,

Paul

how to configure internal DCO for msp430g2553

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Hi,

     how to configure internal DCO for msp430g2553. If i configure DCO then the controller can run on its DCO frequecny right. And can you explain me what is difference between SMCLK and DCO. Thank you.

Electronic Shelf Label

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Hallo TI community,

I am searching for detailed information about the "electronic shelf label" (ESL). I found a block diagramm on TI's homepage which suggests some devices that can be used. Moreover, I would like to know if anyone has further experiences or knowledge about the ESL, such as:

1) What kind of display can be recommended? Size of display? Which information can be displayed?

2) Communication between access point and ESL (Is it possible to trigger an order by pushing a button etc.? What kind data is transferred between devices?)

3) Any experiences with connecting ESL to existing inventory software?

4) Which types of batteries are used? Life time? Any experiences with energy harvesting devices and ESL?

5) How many ESL can be used in parallel? How many access points are needed? Operating range between devices?

6) Are there any reference applications? (inventory management? c-parts management?)

7) ...

It will be great if somebody likes to discuss the presented questions!

Thanks in advance!

Best regards,

Bernd Gerding

"Sync" instruction

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Hi,

I have one question.

Does C66x devices have "Sync" instruction.

I don't know well regarding DSP instruction. Some risc processor has "Sync" instruction. "Sync" instruction guarantees  the order of memory access.

Does C66x have similar instruction?

My customer would like to evaluate C66x performance. So customer would like to measure the execution time of the functions. Customer thinks to use

the below sequence.

* Read the timer value   --->   * Execute the function    --->   * Read the timer value

But, if the order of  the function instruction and timer read instruction are changed, it is impossible exactly to measure the execution time of the function.

So customer hopes to guarantee the order of instruction never changed.

Does someone have the answer of this question? 

I appreciate your quick reply.

Best regards,

Michi

ADC10D1500CIUT Clock coupling issue

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hi

We have used your part ADC10D1500CIUT in our application as a Analog to digital converter .This board Schematics design based on ADC10D1500CIUT reference Schematics. While testing it's observed, The clock frequency is given to ADC (1350Mhz)& with out analog input and plot the FFT using the 16K ADC samples the Clock frequency (Clock /2 =675Mhz)compoent is appearance in FFT plot . Kindly provide your suggesion for this issuevv

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