Part Number: AM5728
Customer working on thier own custom AM5728 boards. Software was initialliy developed on the EVM Difference between the AM572x EVM and custom board is that the custom board has 2 LCD panels connected to different DPI vs. one DPI LCD and one HDMI on the EVM. They are having trouble getting this configured and looking for guidance.
They are able to output to either LCD1 or LCD2, but not both. Custom device tree file looks like this
lcd0: display {
status = "okay";
compatible = "osddisplays,osd070t1718-19ts", "panel-dpi";
backlight = <&lcd_bl>;
enable-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
label = "lcd";
panel-timing {
clock-frequency = <33000000>;
de-active = <1>;
hactive = <1280>;
hback-porch = <16>;
hfront-porch = <210>;
hsync-active = <0>;
hsync-len = <30>;
pixelclk-active = <1>;
vactive = <800>;
vback-porch = <10>;
vfront-porch = <22>;
vsync-active = <0>;
vsync-len = <13>;
};
port {
lcd0_in: endpoint {
remote-endpoint = <&dpi0_out>;
};
};
};
lcd1: display1
{
status = "okay";
compatible = "osddisplays,osd070t1718-19ts", "panel-dpi";
backlight = <&lcd_bl>;
enable-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>;
label = "lcd2";
panel-timing {
clock-frequency = <33000000>;
de-active = <1>;
hactive = <1280>;
hback-porch = <16>;
hfront-porch = <210>;
hsync-active = <0>;
hsync-len = <30>;
pixelclk-active = <1>;
vactive = <800>;
vback-porch = <10>;
vfront-porch = <22>;
vsync-active = <0>;
vsync-len = <13>;
};
port {
status = "okay";
lcd1_in: endpoint {
remote-endpoint = <&dpi1_out>;
};
};
};
&dss {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
status = "okay";
dpi0_out: endpoint {
status = "okay";
data-lines = <24>;
remote-endpoint = <&lcd0_in>;
};
};
port@1
{
reg = <1>;
status = "okay";
dpi1_out: endpoint {
status = "okay";
data-lines = <24>;
remote-endpoint = <&lcd1_in>;
};
};
};
};
With this in place, they get output on LCD1 but not LCD2. If they probe the LCD DE, HSYNC, or VSYNC lines for LCD2, they see no activity. They found this e2e discussion https://e2e.ti.com/support/processors/f/791/t/646224 and tried the solution mentioned there, but still only get output on LCD1.
They can reverse which LCD works in a number of ways. For instance, swapping the reg settings for the dss ports, so that port with dpi0_out uses reg=<0> and the one with dpi1_out use reg=<1> will then show output on LCD2. Also, they can use a uboot option omapdrm.displays=1,0 and also get output on LCD2 but not LCD1 (and no DE, HSYNC, or VSYNC activity for LCD1).
Below is the output when I use the modetest utility. They can see the two DPI interfaces showing up there, so they must be missing some other configuration setting.
===================================================================
# modetest
trying to open device 'i915'...failed
trying to open device 'amdgpu'...failed
trying to open device 'radeon'...failed
trying to open device 'nouveau'...failed
trying to open device 'vmwgfx'...failed
trying to open device 'omapdrm'...done
Encoders:
id crtc type possible crtcs possible clones
34 39 TMDS 0x00000001 0x00000000
40 0 TMDS 0x00000002 0x00000000
Connectors:
id encoder status name size (mm) modes encoders
35 34 connected DPI-1 0x0 1 34
modes:
name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot)
1280x800 25 1280 1490 1520 1536 800 822 835 845 33000 flags: nhsync, nvsync; type: preferred, driver
props:
1 EDID:
flags: immutable blob
blobs:
value:
2 DPMS:
flags: enum
enums: On=0 Standby=1 Suspend=2 Off=3
value: 0
5 link-status:
flags: enum
enums: Good=0 Bad=1
value: 0
41 0 connected DPI-2 0x0 1 40
modes:
name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot)
1280x800 25 1280 1490 1520 1536 800 822 835 845 33000 flags: nhsync, nvsync; type: preferred, driver
props:
1 EDID:
flags: immutable blob
blobs:
value:
2 DPMS:
flags: enum
enums: On=0 Standby=1 Suspend=2 Off=3
value: 0
5 link-status:
flags: enum
enums: Good=0 Bad=1
value: 0
CRTCs:
id fb pos size
39 64 (0,0) (1280x800)
1280x800 25 1280 1490 1520 1536 800 822 835 845 33000 flags: nhsync, nvsync; type: preferred, driver
props:
23 CTM:
flags: blob
blobs:
value:
24 GAMMA_LUT:
flags: blob
blobs:
value:
25 GAMMA_LUT_SIZE:
flags: immutable range
values: 0 4294967295
value: 256
30 background:
flags: range
values: 0 16777215
value: 0
31 trans-key-mode:
flags: enum
enums: disable=0 gfx-dst=1 vid-src=2
value: 0
32 trans-key:
flags: range
values: 0 16777215
value: 0
33 alpha_blender:
flags: range
values: 0 1
value: 0
37 rotation:
flags: bitmask
values: rotate-0=0x1 rotate-90=0x2 rotate-180=0x4 rotate-270=0x8 reflect-x=0x10 reflect-y=0x20
value: 1
27 zorder:
flags: range
values: 0 3
value: 0
47 0 (0,0) (0x0)
0 0 0 0 0 0 0 0 0 0 flags: ; type:
props:
23 CTM:
flags: blob
blobs:
value:
24 GAMMA_LUT:
flags: blob
blobs:
value:
25 GAMMA_LUT_SIZE:
flags: immutable range
values: 0 4294967295
value: 256
30 background:
flags: range
values: 0 16777215
value: 0
31 trans-key-mode:
flags: enum
enums: disable=0 gfx-dst=1 vid-src=2
value: 0
32 trans-key:
flags: range
values: 0 16777215
value: 0
33 alpha_blender:
flags: range
values: 0 1
value: 0
43 rotation:
flags: bitmask
values: rotate-0=0x1 rotate-90=0x2 rotate-180=0x4 rotate-270=0x8 reflect-x=0x10 reflect-y=0x20
value: 1
27 zorder:
flags: range
values: 0 3
value: 0
Planes:
id crtc fb CRTC x,y x,y gamma size possible crtcs
36 39 64 0,0 0,0 0 0x00000003
formats: RX12 AR12 RG16 XR24 RG24 AR24 RA24 RX24 AR15 XR12 RA12 XR15
props:
6 type:
flags: immutable enum
enums: Overlay=0 Primary=1 Cursor=2
value: 1
37 rotation:
flags: bitmask
values: rotate-0=0x1 rotate-90=0x2 rotate-180=0x4 rotate-270=0x8 reflect-x=0x10 reflect-y=0x20
value: 1
27 zorder:
flags: range
values: 0 3
value: 0
38 zpos:
flags: range
values: 0 3
value: 0
28 global_alpha:
flags: range
values: 0 255
value: 255
29 pre_mult_alpha:
flags: range
values: 0 1
value: 0
42 0 0 0,0 0,0 0 0x00000003
formats: RG16 RX12 YUYV AR15 RA24 NV12 RA12 XR24 RG24 UYVY AR12 XR15 AR24 XR12 RX24
props:
6 type:
flags: immutable enum
enums: Overlay=0 Primary=1 Cursor=2
value: 1
43 rotation:
flags: bitmask
values: rotate-0=0x1 rotate-90=0x2 rotate-180=0x4 rotate-270=0x8 reflect-x=0x10 reflect-y=0x20
value: 1
27 zorder:
flags: range
values: 0 3
value: 0
44 zpos:
flags: range
values: 0 3
value: 0
28 global_alpha:
flags: range
values: 0 255
value: 255
29 pre_mult_alpha:
flags: range
values: 0 1
value: 0
48 0 0 0,0 0,0 0 0x00000003
formats: RG16 RX12 YUYV AR15 RA24 NV12 RA12 XR24 RG24 UYVY AR12 XR15 AR24 XR12 RX24
props:
6 type:
flags: immutable enum
enums: Overlay=0 Primary=1 Cursor=2
value: 0
49 rotation:
flags: bitmask
values: rotate-0=0x1 rotate-90=0x2 rotate-180=0x4 rotate-270=0x8 reflect-x=0x10 reflect-y=0x20
value: 1
27 zorder:
flags: range
values: 0 3
value: 2
50 zpos:
flags: range
values: 0 3
value: 2
28 global_alpha:
flags: range
values: 0 255
value: 255
29 pre_mult_alpha:
flags: range
values: 0 1
value: 0
53 0 0 0,0 0,0 0 0x00000003
formats: RG16 RX12 YUYV AR15 RA24 NV12 RA12 XR24 RG24 UYVY AR12 XR15 AR24 XR12 RX24
props:
6 type:
flags: immutable enum
enums: Overlay=0 Primary=1 Cursor=2
value: 0
54 rotation:
flags: bitmask
values: rotate-0=0x1 rotate-90=0x2 rotate-180=0x4 rotate-270=0x8 reflect-x=0x10 reflect-y=0x20
value: 1
27 zorder:
flags: range
values: 0 3
value: 3
55 zpos:
flags: range
values: 0 3
value: 3
28 global_alpha:
flags: range
values: 0 255
value: 255
29 pre_mult_alpha:
flags: range
values: 0 1
value: 0
Frame buffers:
id size pitch