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THS4042: Can THS4042 drive 0.1uF output capacitance with Figure 68. Noninverting, Unity Gain Schematic on page 17?

November 26, 2019, 2:19 am
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Part Number: THS4042

 Hello guys,

 One of my customers is concidering using THS4042 to drive 0.1uF output capacitor and 2kohm output resistor with gain 1.

 They have a few questions as the follows.

 Q1. In case of 0.1uF output capacitor driving with gain 1, can Figure 68. Noninverting, Unity Gain Schematic on page 17 in the device datasheet be used?

 Q2. When Figure 68 schematic can be used, .Is 20ohm resistor not needed betwee THS4042 output and 0.1uF capacitor like Figure 65. Driving a Capacitive Load for Extra Stability on page16?

 Q3.  Do you have any other op amp which can drive 0.1uF output capacitor and 2kohm output resistor with gain 1?

         The customer operation conditions: VCC=+/-15V, Gain=1, Vin(pp)=100mV, CL=0.1uF, RL=2kohm.  

 Your reply would be much appreciated.

 Best regards,

 Kazuya.

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CCS/MSP430F413: Delay function for 1 sec

November 26, 2019, 2:21 am
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Part Number: MSP430F413

Tool/software: Code Composer Studio

msp430f413 Timer delay calculation and delay function for 1 sec 

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LM25141-Q1: LM25141-Q1 / LM5141-Q1 error amplifier gain bandwidth product

November 26, 2019, 2:23 am
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Part Number: LM25141-Q1

Hi Team,

What is LM25141-Q1 / LM5141-Q1 error amplifier gain bandwidth product? 

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LM66100: Iout,Off at 65°C ?

November 26, 2019, 2:24 am
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Part Number: LM66100

Team,

A customer of mine is designing an application where LM66100 should be used for power ORing between a battery and an external power supply. 

They would like to know how the Iout,Off (Vout-Vin<1V, Vce>Vin+80mV) will be at 65°C. The datasheet only gives a max value for -40 to 85 °C. But my customer would like to know what to expect at 65 °C. Can we give a worst case estimate?

Thanks,
  Robert

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TMS320C5535: Speech Recognition on TMS320C5535

November 26, 2019, 2:28 am
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Part Number: TMS320C5535

Hi,

i would like work on some studies with relation to speech recognition via TMS320C5535 & I came across TIDEP0066, i was wondering if it's possible for me to request for TMDX5535EZDSP? I can't seem to find this EVM in Samples store. Please advise also if there are other chipsets which are recommended for speech recognition on handheld devices. Thanks.

Regards,

Leo

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CCS/CCSTUDIO: Using standard input and output library.

November 26, 2019, 2:34 am
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Part Number: CCSTUDIO

Tool/software: Code Composer Studio

I am using CCS 8.3.1. I want to print any massage like "hi" ,"hello",etc. when I am read about this i understand that printf,scanf such fuction required more heap size so I change it ,but still on console there nothing will print which is in printf fuction.

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CCS/TMS320F28379D: scib scia comunication

November 26, 2019, 2:35 am
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Part Number: TMS320F28379D

Tool/software: Code Composer Studio

Somebody can help me posting an example code where scia and scib are linked?

i  would like to see them comunicate :)

thanks for the help

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MSP430F5659: 0xFF instead of my_data in my main memory location

November 26, 2019, 2:37 am
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Part Number: MSP430F5659

Goodmorning TI experts!

I'm here today because I don't understand what is going on with my project.

I have to store some data in a particular main memory area.

In the link.cmd file I create

my_ROM   : origin = 0x8000, length = 0x0100
.DEFAULT  : {} > my_ROM    /*Definizione della mia zona DEFAULT */

Then in my main.c I declare the constants I want to be there in this main memory area:

#pragma SET_DATA_SECTION (".DEFAULT")

const unsigned int FLAG_ATTIVAZIONI_D=0x00;
const unsigned int FLAG_ATTIVAspeciale_D=0x0C;
const unsigned int FLAG_ALLARMI_D=0x00;

#pragma  SET_DATA_SECTION()

Until today I was able to see the correct values of my const data in the right place of the main memory.

This morning when I launched the debug (anything was changed) I see that all my constants were well placed, but all with 0xFF value instead of the right ones.

Is there a way to understand what's wrong?

I tried to change the address of the DEFAULT data section but, unfortunately, I have the same response: right place, wrong values.

Any advice to solve this issue would be really appreciated!

Best Regards,

Maria Angela

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TCAN1043-Q1: How to test nfault pin in can bus failures

November 26, 2019, 2:38 am
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Part Number: TCAN1043-Q1

HI ti team,

1, Could you pls help us check how to test the nfault pin in can bus failures?

I test in normal mode,short the CANH to GND,the nfault pin also is high no changed to low

2, in Standy mode, if use can bus to wake up,the nfault pin also is high no changed. Can I wake up the MCU with Nfault pin when Can bus signals?

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TDA2PXEVM: Use of utility links to support switching channel in VPE

November 26, 2019, 2:38 am
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Part Number: TDA2PXEVM

Hello,

Is is possible to perform changing of channel on an arbitrary link during runtime?

The Display link has this function in itself, but is it possible to perform it on other links.
For example:

NullSource (IPU1_0) -> Gate_Idle -> Merge -> Select -> VPE -> XXXXSink

IssCapture -> IssM2mIsp -> Gate_Cam -> Merge

IssM2mIsp -> Alg_IssAewb

In the above chain, the link XXXSink only supports single channel.
But to support multiple paths, I am planning on using Select link to specify which outgoing channel will be in channel ID 0.

Unfortunately, it does not seem to work at runtime.

Sorry for the fundamental inquiry but I appreciate the help to point me in the right direction.

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DAC38RF89: no output data / single tone

November 26, 2019, 2:48 am
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Part Number: DAC38RF89

Hello!

I have a custom DAC38RF89 board with no JTAG available.

Here is my use conditions:

- dacclk=328MHz, PLL, interpolation=24

- single DAC, LMFS=22210, K=16

- JESD204b subclass 0 (sysref internally genereted)

For now, I have progress with JESD204b passing most of SerDes tests (PRBS-7/23/31) and link tests (k28.5, d21.5) according to lane alarms and sync status stable HIGH.

But when running in "non-test flow" there is no output data from DAC, I mean no data at all - no matter configured as normal operation or constant single tone (0x12F 0x0001 / 0x130 0x7FFF).

My config with actual reg data is in attachment.

Thanks!

Alex

(Please visit the site to view this file))

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[AM5718] Device cannot boot up. omap_hwmod: mcasp3: _wait_target_ready failed: -16.

November 26, 2019, 2:51 am
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Hi TI:

We have some main boards can't boot up sometimes.

The fail log is below.

It looks like TI audio driver broken during mcasp3 probing.

[    2.700700] omap_hwmod: mcasp3: _wait_target_ready failed: -16

Can you help us to analyze root cause?

Fail log:

[    2.689149] Dark debug davinci_mcasp_probe
[    2.700700] omap_hwmod: mcasp3: _wait_target_ready failed: -16
[    2.712987] davinci-mcasp 48468000.mcasp: use pm_runtime_put_sync_suspend() in driver?
[    2.727992] ------------[ cut here ]------------
[    2.732631] WARNING: CPU: 0 PID: 1 at /media/SSDc/SDC/Dark/RV700/workspace/build/arago-tmp-external-linaro-toolchain/work-shared/am57xx-rv700/kernel-source/drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x25c/0x36c
[    2.752087] 44000000.ocp:L3 Custom Error: MASTER MPU TARGET L4_PER2_P3 (Read): Data Access in User mode during Functional access
[    2.763693] Modules linked in:
[    2.766760] CPU: 0 PID: 1 Comm: swapper Not tainted 4.9.41-gc35b478452 #10
[    2.773658] Hardware name: Generic DRA72X (Flattened Device Tree)
[    2.779770] Backtrace:
[    2.782233] [<c020b6a0>] (dump_backtrace) from [<c020b95c>] (show_stack+0x18/0x1c)
[    2.789829]  r7:00000009 r6:00000000 r5:c0bff54c r4:ee883ae0
[    2.795511] [<c020b944>] (show_stack) from [<c04dc134>] (dump_stack+0x24/0x28)
[    2.802762] [<c04dc110>] (dump_stack) from [<c022d8a0>] (__warn+0xe8/0x100)
[    2.809750] [<c022d7b8>] (__warn) from [<c022d8f8>] (warn_slowpath_fmt+0x40/0x48)
[    2.817260]  r9:0000001a r8:ee9c0050 r7:c0bff3b8 r6:00000002 r5:c0bff478 r4:c0bff51c
[    2.825033] [<c022d8bc>] (warn_slowpath_fmt) from [<c050edc8>] (l3_interrupt_handler+0x25c/0x36c)
[    2.833936]  r3:ee9bae80 r2:c0bff51c
[    2.837518]  r4:80080003
[    2.840058] [<c050eb6c>] (l3_interrupt_handler) from [<c026a5f0>] (__handle_irq_event_percpu+0xb4/0x144)
[    2.849573]  r10:c101c030 r9:ee864700 r8:00000017 r7:ee883c04 r6:00000000 r5:ee864700
[    2.857429]  r4:ee9c03c0

DarkHou

(Please visit the site to view this file)

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TAS2505-Q1: About Reserved Register

November 26, 2019, 2:52 am
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Part Number: TAS2505-Q1

Hi TI-team

I saw "TAS2505 Application Reference Guide".

There is a description of ”Reserved. Don't write any value other than Reset Value. ” on the ”Page 1 / Register 2: LDO Control Register - 0x01 / 0x0” on page 70.

However, in ”# LDO output programmed as 1.8V and Level shifters powered up. (P1, R2, D5-D4=00, D3=0)"  of P.51, “W 30 02 0” is written to register.

Is there no problem ?

 

Best Regards,

Koji Hayashi

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CCS/CC2642R: How to Using analog pin as digital input/output

November 26, 2019, 2:52 am
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Part Number: CC2642R

Tool/software: Code Composer Studio

I am trying to use DIO_26 which is an analog pin as digital.

Board_init();

GPIO_init();

/* Configure the LED and button pins */
GPIO_setConfig(CC26X2R1_LAUNCHXL_GPIO_LED_RED, GPIO_CFG_OUT_STD | GPIO_CFG_OUT_LOW);
GPIO_setConfig(CC26X2R1_LAUNCHXL_DIO26_ANALOG, GPIO_CFG_OUT_STD | GPIO_CFG_OUT_LOW);


/* Turn on user LED */
GPIO_write(CC26X2R1_LAUNCHXL_GPIO_LED_RED, Board_GPIO_LED_ON);
GPIO_write(CC26X2R1_LAUNCHXL_DIO26_ANALOG, Board_GPIO_LED_ON);

while (1)
{
GPIO_write(CC26X2R1_LAUNCHXL_GPIO_LED_RED, Board_GPIO_LED_ON);
GPIO_write(CC26X2R1_LAUNCHXL_DIO26_ANALOG, Board_GPIO_LED_ON);
sleep(1);

GPIO_write(CC26X2R1_LAUNCHXL_GPIO_LED_RED, Board_GPIO_LED_OFF);
GPIO_write(CC26X2R1_LAUNCHXL_DIO26_ANALOG, Board_GPIO_LED_OFF);
sleep(1);
}

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TMS320C6678: Demo in MyExampleProjects

November 26, 2019, 2:52 am
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Part Number: TMS320C6678

Hi,

I have built demos in ti-processor-sdk-rtos-c667x-evm\pdk_c667x\packages\MyExampleProjects successfully.

But i don't know the architecture of these projects based on RTOS. Could you please help provide user guide about how to learn these demo quickly?

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TPS61022: application question of TPS61022

November 26, 2019, 2:55 am
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Part Number: TPS61022

Hi Team,

my customer using TPS61022 for solution , and having a question as below

if they using TPS61022 to convert 5V to 5V for system. What's the rating of D1 ? do you have an recommend part as reference?

The application Vin is 4.75~5.25, design output target is 5V/2.2A (Max)

please kindly help to give the suggestion , thanks a lot!

Andy 

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LMZ31520: SENSE+ to Vout via extra resistor ?

November 26, 2019, 2:56 am
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Part Number: LMZ31520

Hi,

SENSE+ seems connected to ADJ pin via 1K43 internally.

For my application, the resistor between ADJ pin and VOUT must be >=6K

Can I add extra resistor (e.g. 4K7) in series from SENSE+ to Vout to achieve this without unexpected side issues ?

(I understand Table 1 is not valid anymore to calculate Rset)

thx,

Rudi

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CC3220S: Query on "FLASH SPI" interface of CC3220

November 26, 2019, 2:58 am
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Part Number: CC3220S

If "FLASH SPI" interface of CC3220 is connected with external 4MB spi flash.

out if 4MB how much size is needed to store application code?

On which location I have to store?

How can I program application code to external spi flash? 

an I use remaining external flash for other data storage purpose?

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BQ25606: Whether Ilim has influence on Ichg

November 26, 2019, 3:04 am
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Part Number: BQ25606

Hi Team,

If I set Ilim is 0.5-1A, will it have influence on Ichg?

As my understanding, ILIM and ICHG are independent...

ICHG depends on KICHG and RICHG;ILIM depends on KILIM and RILIM, right? So even I set limitation on ILIM, it won't influence ICHG...

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TLV320AIC3104: Connecting two TLV320AIC3104 in Master/Slave mode

November 26, 2019, 3:13 am
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Part Number: TLV320AIC3104

Hi, 

I have application where I need to connect two codecs back-to-back and route the MIC from Master to Headphones out on Slave,

then MIC from Slave to Headphones of Master. I have made a mockup schematics. 

Note in the schematic that the two I2C busses are routed to different I2C port of the uc, otherwise access to them would crash.

Have someone done this already? Will it work? Can someone verify the schematics?

Note the blue and green dotted lines that show the logical audio pathways throughout the system.

Clas in Taipei

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