Part Number: AM5728
I created a SYSBIOS based application that is loosely based on IPC example ex02message.
I overrode the timer tick SWI and added a call to trigger and task when the system timer fires. See
void myTimerTick(void)
{
Semaphore_post(SEM_TickTask);
Clock_tick();
}
Void FTSK_TestTask(UArg arg0, UArg arg1)
{
uint32_t delta;
timing_info.average = 0;
timing_info.n = 0;
timing_info.max = 0;
timing_info.min = 0xffffffff;
period = Timer_getPeriod(TMR_system);
while (1) {
Semaphore_pend(SEM_TickTask, BIOS_WAIT_FOREVER);
count = Timer_getCount(TMR_system);
delta = count;
if (delta > timing_info.max)
timing_info.max = delta;
if (delta < timing_info.min)
timing_info.min = delta;
timing_info.sum += delta;
timing_info.n++;
timing_info.average = timing_info.sum / timing_info.n;
}
}
Then, inside the .cfg file I have
/* Create Timer module */
Program.global.TMR_system = Timer.create(Clock.timerId, '&myTimerTick', timerParams);
The code seems to run fine, but I'm puzzled as to why I get a 34 microsecond maximum latency when the average is 2.66 microseconds....
DSP stats [152373] max 34.81 usec, min 2.06 usec, average 2.66 usec
Note the counter time counts are scaled by
Timer_getFreq(TMR_system, &freq);
if (0 == freq.lo)
freq.lo = 1;
scale = 1000000.0 / (float)freq.lo;
then
sprintf(msg->data, "[%d] max %8.2f usec min %8.2f usec average %8.2f usec\n",
timing_info.n,
(float)timing_info.max * scale,
(float)timing_info.min * scale,
(float)timing_info.average * scale);
With results send back over IPC.
Config.bld contains
Build.platformTable["ti.platforms.evmDRA7XX:dsp1"] = {
externalMemoryMap: [
[ "EXT_CODE", evmDRA7XX_ExtMemMapDsp.EXT_CODE ],
[ "EXT_DATA", evmDRA7XX_ExtMemMapDsp.EXT_DATA ],
[ "EXT_HEAP", evmDRA7XX_ExtMemMapDsp.EXT_HEAP ],
[ "TRACE_BUF", evmDRA7XX_ExtMemMapDsp.TRACE_BUF ],
[ "EXC_DATA", evmDRA7XX_ExtMemMapDsp.EXC_DATA ],
[ "PM_DATA", evmDRA7XX_ExtMemMapDsp.PM_DATA ],
],
codeMemory: "EXT_CODE",
dataMemory: "EXT_DATA",
stackMemory: "EXT_DATA",
l1DMode: "32k",
l1PMode: "32k",
l2Mode: "128k"
};
so as to enable all caches....
What is going on?
