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CC2538: What is the address location of NV RAM for current channel number for Zigbee network in CC2538 ZNP device.

September 24, 2019, 3:04 am
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Part Number: CC2538

Hello Community,

I am working on the CC258 ZNP device. 

I wants to get the value of current channel on which the zigbee network is setup. (Not channel List)

Is it store in NV RAM,

if so what is it's address location. 

else,

How I am able to get the value of current channel using MT commands.



Regards,

Shiv Patil.

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SYSBIOS: f_mkdir() api issue with with psdk3_05

September 24, 2019, 3:06 am
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Part Number: SYSBIOS

Hey,

I am running into trouble with f_mkdir() with sd card.

See the following thread for detailed information of the issue.

Do you have any ideas on this?

best regards,

Nicolas Rausch

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AM3352: EMMC is not being detected in TI-SDK-Linux

September 24, 2019, 3:10 am
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Part Number: AM3352

Hi,

I'm using AM3352 Sitara Processor with ti-sdk-linux version 5.2. We're interfacing MTFC32GJDED-4M_IT_eMMC through MMC interface. Here is my mmc portion of dts file:

mmc2_pins: mmc2_pins {
pinctrl-single,pins = <
/************************ EMMC Interface ************************/
/* Control Lines */
0x80 (PIN_INPUT | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
0x168 (PIN_OUTPUT | MUX_MODE7) /* (E18) UART0_nCTS.gpio1[8] nEMMC1_RST */

/* Data Lines */
0x20 (PIN_INPUT | MUX_MODE2) /* GPMC_AD8.EMMC1_DATA0 */
0x24 (PIN_INPUT | MUX_MODE2) /* GPMC_AD9.EMMC1_DATA1 */
0x28 (PIN_INPUT | MUX_MODE2) /* GPMC_AD10.EMMC1_DATA2 */
0x2C (PIN_INPUT | MUX_MODE2) /* GPMC_AD11.EMMC1_DATA3 */
0x30 (PIN_INPUT | MUX_MODE2) /* GPMC_AD12.EMMC1_DATA4 */
0x34 (PIN_INPUT | MUX_MODE2) /* GPMC_AD13.EMMC1_DATA5 */
0x38 (PIN_INPUT | MUX_MODE2) /* GPMC_AD14.EMMC1_DATA6 */
0x3C (PIN_INPUT | MUX_MODE2) /* GPMC_AD15.EMMC1_DATA7 */
/************************ EMMC Interface ************************/
>;
};

With this configuration, U-Boot is detecting the MMC, and it printing log message like: MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1 (Here MMC0 is SD card, MMC1 is eMMC). But when it comes to linux, device is not getting mapped under /dev directory.

Please advice as I'm new in this area.

Regards,

Srikanth Vemula.

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TPS23880: EA Plugfests

September 24, 2019, 3:16 am
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Part Number: TPS23880

Hi Team,

Is there any SW or HW update after the EA Plugfests this year?

Best regards,

C.T.

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CC1312R: ApiMac_mcpsDataReq and SSI DMA conflict?

September 24, 2019, 3:21 am
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Part Number: CC1312R

I am trying to track an issue that seems to be caused by a task call to ApiMac_mcpsDataReq() when the SSI module is setup in a SWi with DMA.

The SSI is set up for SPI slave operation and receives a message from the master. This triggers a SWi which responds to the message by putting data in the Tx FIFO via DMA. The same SWi then sends some data to a task using a Mailbox. When the SWi completes and the task runs, it transmits data over the air using ApiMac_mcpsDataReq() using data received through the Mailbox. This process happens every 60s. About every 2-3 hours I get an SPI failure. By commenting out ApiMac_mcpsDataReq() the SPI runs smoothly.

The SPI data I'm putting in the FIFO is only 7 bytes long so will fit into the FIFO as soon as the DMA is enabled so I don't understand why a call to ApiMac_mcpsDataReq() would affect data already in the Tx FIFO.

Can anyone tell me if ApiMac_mcpsDataReq() is able to affect the SSI in any way?

Thanks,

Andy

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TM4C1294KCPDT: PWM

September 24, 2019, 3:24 am
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Part Number: TM4C1294KCPDT

Hi,

Is it possible to define the period of PWM during initialization.?

Or define the status of PWM pins during initialization.

Regards

Nikhil

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MSP432E411Y: Need a faster clock - alternatives?

September 24, 2019, 3:31 am
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Part Number: MSP432E411Y

Hi There,

I have a design where the MK66FN2M0VMD18 is used today. The overall specs are ok but I want to use a TI alternative. One of the main limiting factors with TI is the clock speed of 120MHz and 180MHz would be needed. Please let me know if the Simplelink family has an alternative or if there is another MCU that I have overlooked.

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CC1310: JTAG communication Error

September 24, 2019, 3:33 am
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Part Number: CC1310

Dear Team

One of  my customer is working on CC1310 and using XDS110 as debugger. The issue is that they are not able to connect to CC1310F128. When want to load the software to CC1310, they see this error " CC1310: JTAG Communication Error: (Error -1170 @ 0x0) Unable to access the DAP". Please see attached the JTAG connection. Could you please check and comment on this issue?

Best Regards

Yunus

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DRV10983: ..DRV 10983 SPEED CONTROLLING

September 24, 2019, 3:38 am
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Part Number: DRV10983

Hi sir,

      presently am working with DRV10983 BLDC Driver. In this am configured my board as pwm mode to control speed(override bit am making 0).so am appling pwm signal with 50% duty cycle.

but my motor speed was not changing with the dutycycle.please suggest any other register i need to configu.(in 0x2B reguster am making pwm mode).

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CCS/LAUNCHXL-CC1352P: Porting RTLS project for CC26X2R1 to CC1352P

September 24, 2019, 3:45 am
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Part Number: LAUNCHXL-CC1352P

Tool/software: Code Composer Studio

Hi there, as previous post, I'm porting RTLS project for CC26X2R1 to CC1352P.

First, I was changing the project properties and codes as below:
================================================================================================

  • Hardware (BOOSTXL-AOA) jump for rtls_passive
  • BOOSTXL-AOA | LAUNCHXL-CC1352P-2
    ————————————————————
    DIO27 (Ax)         | DIO24
    DIO28 (Ax.1)      | DIO25
    DIO29 (Ax.2)      | DIO26
    DIO30 (Ax.3)      | DIO27
  • Project properties (rtls_master, rtls_slave, rtls_passive)
    • General
      • Project
        • Device -> Variant: CC1352P1F3
        • Tool-chain -> Linker command file: cc13x2_cc26x2_app.cmd
      • Products
        • Target: ti.targets.arm.elf.M4F
        • Platform: ti.platforms.simplelink:CC1352P1F3
    • Build
      • ARM Compiler
        • Predefined Symbols(DeviceFamily): DeviceFamily_CC13X2
      • ARM Linker
        • File Search Path (changed path)
          • ${COM_TI_SIMPLELINK_CC13X2_26X2_SDK_INSTALL_DIR}/source/ti/ble5stack/libraries/cc1352p/OneLib_coc.a (master, slave)
          • ${COM_TI_SIMPLELINK_CC13X2_26X2_SDK_INSTALL_DIR}/source/ti/ble5stack/libraries/cc1352p/StackWrapper_coc.a (master, slave)
          • ${COM_TI_SIMPLELINK_CC13X2_26X2_SDK_INSTALL_DIR}/source/ti/ble5stack/libraries/cc1352p/ble_r2_coc.symbols (master, slave)
          • ${COM_TI_SIMPLELINK_CC13X2_26X2_SDK_INSTALL_DIR}/source/ti/drivers/rf/lib/rf_multiMode_cc13x2.aem4f (master, slave, passive)
          • ${COM_TI_SIMPLELINK_CC13X2_26X2_SDK_INSTALL_DIR}/source/ti/drivers/lib/drivers_cc13x2.aem4f (master, slave, passive)
          • ${COM_TI_SIMPLELINK_CC13X2_26X2_SDK_INSTALL_DIR}/kernel/tirtos/packages/ti/dpl/lib/dpl_cc13x2.aem4f (master, slave, passive)
  • Code changed
    • /Tools/Defines/rtls_xxxxx_app.opt (master, slave, passive)
      • Pre-define
        • -DCC13X2P
        • -DCC13X2P_2_LAUNCHXL
        • -DCC13XX
        • -DDeviceFamily_CC13X2
    • /Drivers/AOA/AOA.h (master, slave, passive)
      • line 91: #define ANT_ARRAY (24)
      • line 92: #define ANT1             (25)
      • line 93: #define ANT2             (26)
      • line 94: #define ANT3             (27)
    • /Drivers/TOF/TOF.c  (master, slave, passive)
      • line 41: #if defined(CC26X2) || defined(CC13X2P) 
      • line 64: #if defined(CC26X2) || defined(CC13X2P)
      • line 82: #if defined(CC26XX) || defined(CC13XX)
      • line 141: #elif defined(CC26X2) || defined(CC13X2P)
      • line 459: #if defined(CC26X2) || defined(CC13X2P)
    • /Startup/urfc.h (passive)
      • line 254: #if defined(CC13X2) --> Original code has a typo ')' is missed.
    • /Startup/urfc.c (passive)
      • line 89: #if defined(CC26XX_R2) || defined(CC26X2) || defined(CC13X2P)
      • line 105: #ifdefined(CC26XX) || defined(CC13XX)
      • line 107: #if defined(CC26X2) || defined(CC13X2P)
      • line 122: #define ANT1         (1<<25)
      • line 123: #define ANT2         (1<<26)
      • line 124: #define ANT3         (1<<27)
      • line 371: {TX_POWER_20_DBM, RF_TxPowerTable_HighPAEntry(56, 2, 1, 45, 63) } }; // 0x803F5BB8
        --> Original code has a typo, one more '};', it does mean the '{', '}' is not pair. So it removed.

================================================================================================


After complete all of above things, I can see CC1352P cannot find any devices even if "RTLS_CMD_SCAN" is success (When turn on AoA and ToF).

But, CC1352P-2 Board can find slave device and is working with "AoA" when turn off "ToF" by removing below red colored codes:

  • /Master project/main.c
  • rtlsConfig.rtlsCapab = (rtlsCapabilities_e)(RTLS_CAP_RTLS_MASTER| RTLS_CAP_TOF_MASTER | RTLS_CAP_AOA_RX);
  • /Slave project/main.c
    • rtlsConfig.rtlsCapab = (rtlsCapabilities_e)(RTLS_CAP_RTLS_SLAVE | RTLS_CAP_TOF_SLAVE | RTLS_CAP_AOA_TX);
  • /Passive project/main.c
    • rtlsConfig.rtlsCapab = (rtlsCapabilities_e)(RTLS_CAP_RTLS_PASSIVE | RTLS_CAP_CM | RTLS_CAP_TOF_PASSIVE | RTLS_CAP_AOA_RX);

As a result, I find that the pOverrides_2M[] code is for CMD_RADIO_SETUP affect the operation and the pOverrides_2M[] for CC26X2 is not compatible with OneLib_coc.a for CC13X2P.

So, the below lists are what I request:

  1. The pOverrides_2M and pOverridesCommon codes for CC13X2P, the codes are in TOF.c and urfc.c (for passive).
  2. The urfc.c won't toggle the GPIO for Ax (DIO 24), can you provide any information about this?

Best regards,
Inseob

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DS90UB947-Q1: DS90UB947 frequency unstable

September 24, 2019, 3:27 am
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Part Number: DS90UB947-Q1

What will happen If clock frequency of 947(LVDS clock) is unstable?  947  will try to connect to 948?  or only try to re-init itself?  thanks

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Compiler/CC2650: Changing Zigbee beacon interval of cc2560

September 24, 2019, 3:28 am
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Part Number: CC2650

Tool/software: TI C/C++ Compiler

Hello All,

We are using Zstack version 1.2.2a development environment for CC2650.

We want to increase the signal duration between beacons to reduce power consumption of sensor node.

I have following questions:

  • How to change interval between two beacons? Which parameter decides the interval? 
  • if we increase the interval between two beacons, does it increase the connection process duration?
  • What are max and min value for beacon interval?

Regards,

Ankita Tayade

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LP2951: Start Up/Turn On Time for the Voltage Regulator in 3.3V application

September 24, 2019, 3:40 am
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Part Number: LP2951

Hello,

I would like to know what is the minimum turn ON time for the regulator when input is applied to the Vin. pin.

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DS90UB947-Q1: Why screen can not be recovered even short is over

September 24, 2019, 3:43 am
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Part Number: DS90UB947-Q1

I short D2+ and D2- of 947 with tweezers the screen blank. Then I take tweezers away the screen can not be recovered. the screen can be recovered if I short other data line(D0+ D0- and D1+ D1-).

I know DE HS and VS is transmitted by D2, but I want to know why the screen can not be recovered even short is over. Thanks.

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TMDSIDK574: PRU Ethernet ping issue

September 24, 2019, 3:53 am
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Part Number: TMDSIDK574

This is the extension of this thread:
e2e.ti.com/.../3105350

Hardware:
57xx IDK, pru-ethernet via prp (eth2 and eth3).
the san-device (IBM PC).
The IDK pings the san.

I have install the packages for initialize the pru:
1. Copy that libs into the rootfs/usr/lib:
libarchive.so
libarchive.so.13
libarchive.so.13.3.2
libbz2.so
libbz2.so.1
libbz2.so.1.0.6
liblzo2.so
liblzo2.so.2
liblzo2.so.2.0.0
libsolv.so
libsolv.so.0

2. Copy the opkg into the rootfs.

3. Copy that ipk into the rootfs/home/root:
kernel-module-pru-rproc-4.14.67-gd315a9bb00_4.14.67+git0+d315a9bb00-r7a.arago5.tisdk1.3_am57xx_evm.ipk
kernel-module-pruss-4.14.67-gd315a9bb00_4.14.67+git0+d315a9bb00-r7a.arago5.tisdk1.3_am57xx_evm.ipk
kernel-module-pruss-intc-4.14.67-gd315a9bb00_4.14.67+git0+d315a9bb00-r7a.arago5.tisdk1.3_am57xx_evm.ipk
kernel-module-pruss-soc-bus-4.14.67-gd315a9bb00_4.14.67+git0+d315a9bb00-r7a.arago5.tisdk1.3_am57xx_evm.ipk
kernel-module-remoteproc-4.14.67-gd315a9bb00_4.14.67+git0+d315a9bb00-r7a.arago5.tisdk1.3_am57xx_evm.ipk
kernel-module-ti-prueth-4.14.67-gd315a9bb00_4.14.67+git0+d315a9bb00-r7a.arago5.tisdk1.3_am57xx_evm.ipk
prueth-fw_5.1.4-r0_am57xx_evm.ipk
iproute2_4.11.0-r0.arago3_armv7ahf-neon.ipk
libelf1_0.170-r0_armv7ahf-neon.ipk
and install them at linux arago:
opkg --add-arch am57xx_evm:66 install --force-depends kernel-module-pru-rproc-4.14.67-gd315a9bb00_4.14.67+git0+d315a9bb00-r7a.arago5.tisdk1.3_am57xx_evm.ipk
opkg --add-arch am57xx_evm:66 install --force-depends kernel-module-pruss-4.14.67-gd315a9bb00_4.14.67+git0+d315a9bb00-r7a.arago5.tisdk1.3_am57xx_evm.ipk
opkg --add-arch am57xx_evm:66 install --force-depends kernel-module-pruss-intc-4.14.67-gd315a9bb00_4.14.67+git0+d315a9bb00-r7a.arago5.tisdk1.3_am57xx_evm.ipk
opkg --add-arch am57xx_evm:66 install --force-depends kernel-module-pruss-soc-bus-4.14.67-gd315a9bb00_4.14.67+git0+d315a9bb00-r7a.arago5.tisdk1.3_am57xx_evm.ipk
opkg --add-arch am57xx_evm:66 install --force-depends kernel-module-remoteproc-4.14.67-gd315a9bb00_4.14.67+git0+d315a9bb00-r7a.arago5.tisdk1.3_am57xx_evm.ipk
opkg --add-arch am57xx_evm:66 install --force-depends kernel-module-ti-prueth-4.14.67-gd315a9bb00_4.14.67+git0+d315a9bb00-r7a.arago5.tisdk1.3_am57xx_evm.ipk
opkg --add-arch am57xx_evm:66 install --force-depends prueth-fw_5.1.4-r0_am57xx_evm.ipk
opkg --add-arch armv7ahf-neon:56 install --force-depends libelf1_0.170-r0_armv7ahf-neon.ipk
opkg --add-arch armv7ahf-neon:56 install --force-depends iproute2_4.11.0-r0.arago3_armv7ahf-neon.ipk

I have no make more any change in sdk.

So, after the 2nd compilation of sdk, there are are the same bug in the ping: the ping is unstable.

Firstly, the ping is great, up to 10ms.
Then ping gradually decreases downto 0.7ms, and then is again 10ms.
And again.

When IDK pings the 127.0.0.1, the ping is 0.06ms stable.

Please help.

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AFE5832LP: afe5832 gain

September 24, 2019, 3:55 am
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Part Number: AFE5832LP

I have set the register C7H in device and have read out the data correct. but sample data have not change.

for example :

I set c7h  16'h0005

then set c7h  16'h0007

the wave I  catch don't change 

why the LNA GAIN  and PGA GAIN don't work

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Compiler/TM4C129ENCPDT: TM4C129ENCPDT

September 24, 2019, 3:56 am
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Part Number: TM4C129ENCPDT

Tool/software: TI C/C++ Compiler

Hi,

I am new in this TM4c129ENCPDT microcontroller. I want to  create a driver routines to access the Universal Synchronous/Asynchronous Receiver/Transmitter (USART) port of the Tiva™ TM4C129ENCPDT Microcontrolle.I found difficulty to found API functions..I make these functions


//#include <stdbool.h>
#include <stdint.h>
#include "inc/hw_memmap.h"
#include "driverlib/gpio.h"
#include "driverlib/pin_map.h"
#include "driverlib/sysctl.h"
#include "driverlib/uart.h"
#include <main.h>
#include "tm4c129encpdt.h"
    // This function initializes the USART driver
void USART_init(uint32_t ui32Base){
    //Enable UART module 0 (UART0)
    SYSCTL_RCGCUART_R = SYSCTL_RCGCUART_R | 0x01;
    //Enable the clock for GPIO module A, as i am using the UART0
    SYSCTL_RCGCGPIO_R = SYSCTL_RCGCGPIO_R | 0x01;
    //Set the GPIO AFSEL for pin PA0 and PA1
    GPIO_PORTA_AHB_AFSEL_R = GPIO_PORTA_AHB_AFSEL_R | 0x03;
    //Configure GPIO current level (slew rate is not necessary)
    GPIO_PORTA_AHB_DR2R_R = GPIO_PORTA_AHB_DR2R_R | 0x01;
   
    //Configure PCM0 and PCM1 (Pin0 and Pin1)
    GPIO_PORTA_AHB_PCTL_R = GPIO_PORTA_AHB_PCTL_R&0xFFFFFF00; //First reset
    GPIO_PORTA_AHB_PCTL_R = GPIO_PORTA_AHB_PCTL_R | 0x00000011;
   
      //Configure baud-rate divisor (BRD)
    UART0_CTL_R = UART0_CTL_R&(~UART_CTL_UARTEN); // Disable UART
    UART0_IBRD_R = 130;  // IBRD = int(20,000,000 / (16 * 9,600)) = int(130.2083)
   
    UART0_FBRD_R = 13;   // FBRD = int(0.2083 * 64 + 0.5) = int(13)
   
//Configure serial parameters (UARTLCRH)
    UART0_LCRH_R = (UART_LCRH_WLEN_8|USART_LCRH_PAR_NONE|UART_LCRH_STOP_ONE);
    //Configure UART clock source
    UART0_CC_R = UART0_CC_R|0x00; //Using system clock
    //Enable UART
    UART0_CTL_R = UART0_CTL_R|UART_CTL_UARTEN;
 
Are these are right registers and the way of initailizing?
Don't understand  any sugguestion..its very hard to understand because TM4c129ENCPDT microcontroller have no  Peripheral Driver Library user guide for TM4c129ENCPDT.
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TM4C123GH6PM: TM4C123GH6PM

September 24, 2019, 4:00 am
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Part Number: TM4C123GH6PM

Hi!

I am using Windows 10 HOME SINGLE LANGUAGE 64bits and Windows doesn't recognize the LaunchPad. I already tried to install the drivers and i'm sure the USB cable is connected to the DEBUG and not the DEVICE. I'm new in embedded systems so I hope to get some help!!!! Sorry for my English is not good !!! Cordialement !!!

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MSP430FR6879: Changing PxDIR register unintentionally

September 24, 2019, 4:03 am
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Part Number: MSP430FR6879

Hello,

Has there ever been any case where the PxDIR register has changed unintentionally?

Only P85 was changed input port unintentionally after that I set P87-P84 port is output port and P83-P80 is seg signal of LCD.

For now, I don't know the reason why only P8DIR.5 is changed and how to reproduce this phenomenon.

This phenomenon occurred in one of the 130 units produced so far.

Could you give me any opinions about this issue?

Regards,

U-SK

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AM5708: Timer usage

September 24, 2019, 4:14 am
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Part Number: AM5708

We want to use the timer function of 5708 to capture the pulse of phase A and phase B of the encoder. Using the software SDK4.3 and Linux operating system, I checked the introduction of timer in the manual. I want to know which mode should be chosen. Is it the capture mode?

If capture mode is selected, how to generate device nodes? How should I call it on my application layer software? Are there any relevant examples in this regard?

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