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TAS2555: SmartAmp and Tuning

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Part Number:TAS2555

I'm currently working with a pretty small speaker (pn: MD1115N-RC758) and trying to improve audio quality and volume, right now at higher volumes it starts buzzing and the quality gets pretty bad. We're trying to work in SmartAmp mode but we also need the internal boost mode to be off, however it seems that once boost mode is off the SmartAmp doesn't work and the quality gets pretty bad again, has anyone had any experience with this?

Additionally I'm trying to tune the speaker and having a challenging time understanding all of the parameters, anyone have any helpful resources on that?

Thanks in advance!


TPS2553: Output Short to ground

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Part Number:TPS2553

Hi Team,

When TPS2553 output short to ground, I don't understand why the actual waveform at FAULT pin doesn't match to our datasheet?

I thought FAULT should stay LOW forever until output short remove, am I right? But as you can see the picture below, it only stay LOW for 100uS and pull HIGH. Something wrong with the schematics? Thanks for checking.

Andrew 

Linux/BEAGLEBK: Beaglebone am355 add events for GPIO's not on P8 or P9

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Part Number:BEAGLEBK

Tool/software: Linux

Hi,

I am quite new into device-tree, and I still have lacks of understanding it entirely.

I have the arago build already. I enabled the gpio_keys module and a cp2112 module of USB/i2C driver. The cp2112
exposes the device as /dev/i2c-X and the on-board gpio's as /dev/gpiochip4 and  /sys/class/gpio/gpio/gpio (504 .. 511), when exported.

root@am335x-evm:/sys/class/gpio/gpio508# cat value 
1
root@am335x-evm:/sys/class/gpio/gpio508# cat value 
0
cat /sys/kernel/debug/gpio
gpiochip0: GPIOs 0-31, parent: platform/44e07000.gpio, gpio:
 gpio-6   (                    |cd                  ) in  lo IRQ

gpiochip1: GPIOs 32-63, parent: platform/4804c000.gpio, gpio:
 gpio-53  (                    |beaglebone:green:hea) out lo    
 gpio-54  (                    |beaglebone:green:mmc) out lo    
 gpio-55  (                    |beaglebone:green:usr) out hi    
 gpio-56  (                    |beaglebone:green:usr) out lo    

gpiochip2: GPIOs 64-95, parent: platform/481ac000.gpio, gpio:

gpiochip3: GPIOs 96-127, parent: platform/481ae000.gpio, gpio:

gpiochip4: GPIOs 504-511, parent: hid/0003:10C4:EA90.0001, cp2112_gpio, can sleep:
 gpio-508 (                    |sysfs               ) in  hi    

I can read the value from all using the sys filesystem. I have to add them as KEY_EVENTS.

Also they are shown as:   gpiochip4: GPIOs 504-511, parent: hid/0003:10C4:EA90.0001, cp2112_gpio, can sleep

ON which dts file I have to add, or if I am using a totally new one just for the purpose of the keys, where I should look.
I've seen samples but they are using PX  rail names and using unexistent am335x-bbw-bbb-base.h


Thank you.

BQ25713: One cell boost mode

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Part Number:BQ25713

Hi,

I am using BQ25713EVM-017 board and is successful setup two cell boost to 5.0V or 9.0V but not with one cell.

My setup:

- Remove JP 2,3,4 for one cell setup

- Set register 0x04 = 4200mV

- Set register 0x06 = 5000mV

- Set register 0x08 = 3200mA

- Jumper EN_OTG to 3.3V

- Set register 0x34 (Charge Option 3) bit EN_OTG = 1

NO BOOST OUTPUT 

TPS54360: Getting only 1V at the output of TPS54360 using the reference design

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Part Number:TPS54360

hello guys, i needed a DC DC converter for my 5V leds so i decided to design my own instead of buying a ready one. since ive got no knowledge about these things i went with the reference design in the datasheet. i used all the recommended parts with their votlage ratings. i tried 12V, 24V 3A sources but the output is always the same which is steady 1V. 

this is the reference design..

just for the information i would like to provide that i assumed the first pin is the one i pointed in the picture because i couldnt find any other markings for the first pin.

can anybody please give me some directions how to troubleshoot the problem. i really need this to work :( thanks

TINA/Spice/SN74LV4051A: Using the SN74LV4051A in LTSpice

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Part Number:SN74LV4051A

Tool/software:TINA-TI or Spice Models

Hello,

I've imported provided model of SN74LV4051A demux for Spice from the TI website. But unfortunately I have problems using it. From what I've read in the datasheet when the INH signal is 1 then it should not let any signal come to the output. But in my case no matter what the values of INH, A,B and C is, there is always the signal from the Input (COM) on one of the outputs (Y0). I'm even not using it in any circuit it's just this demux connected to some voltage source to see how it should work. Could anyone please tell me what am I doing wrong? I'm attaching my circuit.

CC1352R: TI-15.4 Collector/coprocessor for FreeRTOS

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Part Number:CC1352R

Hi,

I am aware of Linux based TI-15.4 Collector/ coprocessor reference implementation.

Is there any such implementation (including OAD support) available for FreeRTOS?

Please advise. Thanks for your timely attention and help.

AM6546: AM6x Video Encode Processor Loading

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Part Number:AM6546

Team, our customer is attempting to connect a USB-based camera to the AM65x EVM for video streaming. Issue is summarized below and look forward to your guidance!
1. We connected camera to Linux, no issues with camera device driver. Camera provides RAW video.
2. We run gstreamer ( ogg encoding ) and we stream video to ethernet port

What we see is performance issue: ogg encoding delay 8-10s and lets say one frame per 4 seconds streaming. We are investigating if we have integration/build issue or processor performance issue.

So our requirement is to encode RAW video on AM6x and stream it out. First smoke test does not give us best results, we would like to know if you have any performance numbers/examples to help in this process.

Specifically we are looking for video encoder running on AM6x ( we are flexible about encoder ) and associated performance numbers.
We saw some TI ARM multi media bootcamps and TI ARM multimedia collateral in the SDK but nothing for AM6x.

Long question short: what would be processor load to encode 5M pixel , 5 frames per second to ogg, x.264. Any examples of FFmpeg or gstreamer compiled for AM6x ( cortex a53)?


ADC Input Type Question and Part Recommendation

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Hello,

I'm trying to select an ADC right now and I'm a bit confused by all the different ADC input types and which is the right one for me. The signal that I'm converting is coming from the LA 55-P current transducer. It's a bipolar signal and will swing from +5V to -5V. Do I need single ended bipolar input? If you could shed some light on this, it would be much appreciated.

Also, if you could provide an ADC recommendation, that would be much appreciated as well. The requirements are as follows

  • 1 input channel
  • Sample rate of 1MSPS or higher
  • >12 bits of resolution
  • Less parts, the better. Faster assembly and lower elements in the signal chain (lower error) 
  • ADCs need to be able to be daisy chained
  • Enhanced SPI would be preferred. We need to transmit signals over a cable so the lower speed signals would be preferred
  • No BGA or LGA. We need to solder these boards by hand. QFN is doable, but not preferred. 

I was looking at the ADS8691. Would this be a good fit? Is the input type correct?

I am by no means an expert in analog design so if I'm misunderstanding anything in these requirements, please don't hesitate to point it out. I would appreciate that.

Thanks!

TM4C1294NCPDT: The UART RX interrupt can't be triggered

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Part Number:TM4C1294NCPDT

I have an EK-TM4C129XL that is to be control from Matlab on PC over serial/UART.

The problem is that the transmissions from PC do not trigger the receive interrupt. I do not forget to "resume" before trying.

Please check if I correctly configure everything. Here is the relevant code.

void initPCInterface(uint32_t sys_clk)
{

    SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
    GPIOPinConfigure(GPIO_PA0_U0RX);
    GPIOPinConfigure(GPIO_PA1_U0TX);
    GPIOPinTypeUART(GPIO_PORTA_BASE, 0b00000011);
    UARTConfigSetExpClk(UART0_BASE, sys_clk, 57600, 
                        (UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
                                UART_CONFIG_PAR_NONE));
    UARTFIFOEnable(UART0_BASE);
    UARTFIFOLevelSet(UART0_BASE,UART_FIFO_TX2_8, UART_FIFO_RX2_8);
    UARTIntEnable(UART0_BASE, UART_INT_RX);
    UARTIntRegister(UART0_BASE, pcCommInterface);
    IntPrioritySet(INT_UART0,0x20);//MEDIUM PRIORITY
    IntEnable(INT_UART0);
}
void initGPIO(void)
{
    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
    while(!SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOB));
    GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, PB_MASK);
    GPIOPinWrite(GPIO_PORTB_BASE, PB_MASK,0);

    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOP);
    while(!SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOP));
    GPIOPinTypeGPIOOutput(GPIO_PORTP_BASE, PP_MASK);
    GPIOPinWrite(GPIO_PORTP_BASE, PP_MASK,0);

    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
    while(!SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOE));
    GPIOPinTypeGPIOOutput(GPIO_PORTE_BASE, PE_MASK);
    GPIOPinWrite(GPIO_PORTE_BASE, PE_MASK,0);


    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
    while(!SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOC));
    GPIOPinTypeGPIOOutput(GPIO_PORTC_BASE, PC_MASK);
    GPIOPinWrite(GPIO_PORTC_BASE, PC_MASK,0);

    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOQ);
    while(!SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOQ));
    GPIOPinTypeGPIOOutput(GPIO_PORTQ_BASE, PQ_MASK);
    GPIOPinWrite(GPIO_PORTQ_BASE, PQ_MASK,0);

    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOK);
    while(!SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOK));
    GPIOPinTypeGPIOInput(GPIO_PORTK_BASE, PK_MASK);

    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
    while(!SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOD));
    //Unlock PD7, default NMI
     HWREG(GPIO_PORTD_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY;
     HWREG(GPIO_PORTD_BASE + GPIO_O_CR) = 0x80;
    GPIOPinTypeGPIOInput(GPIO_PORTD_BASE, PD_MASK);

    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOM); 
    while(!SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOM));
    GPIOPinTypeGPIOInput(GPIO_PORTM_BASE, PM_MASK);

    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPION);
        while(!SysCtlPeripheralReady(SYSCTL_PERIPH_GPION));
        GPIOPinTypeGPIOInput(GPIO_PORTN_BASE, PN_MASK);

    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
    while(!SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOA));
    GPIOPinTypeGPIOInput(GPIO_PORTA_BASE, PA_MASK);
}

int main(void)
{
    {// limit scope of sys_clock
    uint32_t sys_clock = SysCtlClockFreqSet((SYSCTL_XTAL_25MHZ |
                     SYSCTL_OSC_MAIN | SYSCTL_USE_PLL |
                     SYSCTL_CFG_VCO_480), 120000000);
    initGPIO();
    initPCInterface(sys_clock);
    }//sys_clock is popped from stack
    IntMasterEnable();

	while(true);
}

minimal Matlab test. Matlab successfully opens the port

clear
close all
s=serial('/dev/ttyS0',...
    'BaudRate', 57600,'DataBits', 8,'Parity', 'none', ...
    'StopBits',1, 'Timeout',2);

fopen(s);%successful
fprintf(s, 'rzzzzzklkll');%send something, does nothing
fclose(s);

TPS2546: TPS2546 SDP mode can't charge Apple phone

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Part Number:TPS2546

Hi Adam,

Would you please help to check below information and comment?

Customer reported the iPhone charge terminated when system move the operation from S0 to modern standby mode but the TPS2546 charge mode was stayed SDP without changed. Customer recorded a video(link in the email) and the current meter showed the charge current turn down to 0A while “D+” been pulled up.

Best regards,

Randy Chen

LM5141: Does 0 V at VCC indicate a damaged chip?

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Part Number:LM5141

I have made the following circuit, based on a design recommendation from WebBench:

Some changes have been made since the schematic was printed:

* Switching FETs changed to CSD18563

I have 2 samples of this circuit. One is working as expected, the 2nd one is producing no output voltage.

* 24 V is present at VIN (the label as VCC48 doesn't mean 48 V is expected)

* 3.3 V is present at EN

* No switching activity is seen on the FET gates. 

* No voltage is seen at SS

But the thing that makes me think the chip might be damaged is that 0 V is seen at the VCC pin.

There is not much detail of what is attached to this pin internal to the chip. But I suspect it is just a linear regulator. I don't see any mention of any circumstance that would produce 0 V at VCC if the chip is operating normally. VCCX is shorted to ground as shown in the schematic.

So, can I take the 0 V at VCC as an indication the chip is damaged and needs to be replaced? Are there any operating conditions that should be expected to produce 0 V at VCC?

(I had previously posted another question about the same design, but this is a different problem. In that situation I always saw 5 V at VCC.

Thanks,

Matt

IWR1642BOOST: What is the TX antenna power of IWR1642BOOST?

MSP430FR2512: Bootloader question

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Part Number:MSP430FR2512

We are continuing to develop with the MSP430FR2512 and a question has  come up about customizing the bootloader. The documentation seems to be 
in conflict on this, in the MSP430FR2xx family user guide it says: "The user can define custom BSL code for FRAMbased devices and protect it 
against erasure and unintentional or unauthorized access. (Page 46)" and lists a bit to make the bootloader memory programmable in section 1.15.2 
SYSBSLC Register. But the MSP430 FRAM devices bootloader guide says "BSL application is factory programmed in the read-only memory area of the 
MSP430 devices and cannot be customized. (Page 4)" and "The BSL in MSP430 FRAM devices resides in ROM and does not allow for a custom BSL 
to be loaded into the standard BSL space. (Page 30)".

Can you clarify if the bootloader is customizable on the MSP430FR2512?

Thanks,

Brian Angiel

TPS2546: How to verify TPS2546 behavior normally in each mode

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Part Number:TPS2546

Hi Team,

Our customer want to pre-test TPS2546 before go to 3'rd party LAB.

Any suggested standard test process we can do in advance?

Thanks


CC2640R2F: Long Range

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Part Number:CC2640R2F

Hi Guys,

As the requirement from customer I have implemented the BLE long range on CC2640R2F board,by making use of simple broadcaster(added LR advertisement sets to example code,no other major configuration Change ) application  as our requirement doesn't need any connections .

I was able to advertise LR packets without any issues.

To trade-off between BLe4.2 and BLE5.0, I have flashed my application with BLe5.0 and BLE4.0 with 2 CC2640R2F chip and tested.

Application advertises with limited mode of advertisement.(For 1s it will advertises 10 times then off for 9s and again On for 1sec ..then continues)

But I dint see much difference between BLE4.2 and BLE5.0 as I was able to test only 300m with LOS( test place were only has 300m LOS).  @300m I see that BLE4.0 has 60% of packet loss. and BLE5.0 is around 50% packet loss.( Packet loss means I see only 5 or 6 advertisement out of 10)

Both devices(BLE4.0 and BLE5.0 ) was able to advertise with around same amount of packet loss. So I could not able to find any proof to say BLE5.0 is better:)

Now I am having a doubt like whether I need to do any other configuration and how to tradeoff  between these two with these available data?

Stack i was using is latest:sdk 3.10

Advertising Long range sets with S8 PHY(125kbps)

Tx power level sets to 5dbm,

Receiver side: CC2640R2f launchpad with BLE5 simple central application with receiver sensitivity sets to max(HCI_EXT_RX_GAIN_HIGH).

Please let me know is any other configurations i am missing.

INA219: Supply Voltage Range

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Part Number:INA219

Hello all!!

I am using the INA219 sensor, but I want to know that what is the supply voltage range for this sensor. As previously I had used the 24V supply voltage and it had burned down. So, anyone can help me in this regard. Also if possible can anyone show me the schematic connection of using this sensor. As I have find out the current consumption from my motor.

Thanks 

BQ24073: Always feeding from the battery

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Part Number:BQ24073

Hi,

I followed the design of the http://www.ti.com/lit/ug/slvu274e/slvu274e.pdf and the circuit doesn't draw current from the input, when i connect the supply to the input both /CE and /PGOOD turns on but the battery still feeds the circuit.

It's only supplyng a LED so the current isn't much for the battery to enter in supplement mode.

Those are my schematic and pcb documents.

TMS320F28335: Debugger stopping in EQEP1_INT_ISR after pressing suspend while debugging code

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Part Number:TMS320F28335

Hello,

I am using an XDS100v2 debugger with Code Composer studio v9.0.1.00004 on Windows 7..

While debugging a program, the debugger sometimes stops  in EQEP1_INT_ISR after I pressed the suspend button in Code Composer.  This has happened several time and I think it started happening yesterday. 

My program is not using the EQEP peripheral. 

Below is the EQEP1_INT_ISR code and the state of the relevant registers immediately after the debugger stopped in EQEP1_INT_ISR.. 

As you can see, the PIEIFR5 is not enabled.

What could be causing this issue?

Stephen

interrupt void EQEP1_INT_ISR(void)    // EQEP-1
{
  // Insert ISR Code here

  // To receive more interrupts from this PIE group, acknowledge this interrupt
  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP5;

  // Next two lines for debug only to halt the processor here
  // Remove after inserting ISR Code
  asm ("      ESTOP0");
  for(;;);
}

PIE	Peripheral Interrupt Expansion Registers	
	PIECTRL	0x0D81	PIE, Control Register [Memory Mapped]	
	PIEACK	0x0009	PIE, Acknowledge Register [Memory Mapped]	
	PIEIER1	0x0048	PIE, INT1 Group Enable Register [Memory Mapped]	
	PIEIFR1	0x0029	PIE, INT1 Group Flag Register [Memory Mapped]	
	PIEIER2	0x0000	PIE, INT2 Group Enable Register [Memory Mapped]	
	PIEIFR2	0x0000	PIE, INT2 Group Flag Register [Memory Mapped]	
	PIEIER3	0x0000	PIE, INT3 Group Enable Register [Memory Mapped]	
	PIEIFR3	0x0000	PIE, INT3 Group Flag Register [Memory Mapped]	
	PIEIER4	0x0003	PIE, INT4 Group Enable Register [Memory Mapped]	
	PIEIFR4	0x0003	PIE, INT4 Group Flag Register [Memory Mapped]	
	PIEIER5	0x0000	PIE, INT5 Group Enable Register [Memory Mapped]	
	PIEIFR5	0x0000	PIE, INT5 Group Flag Register [Memory Mapped]	
	PIEIER6	0x0000	PIE, INT6 Group Enable Register [Memory Mapped]	
	PIEIFR6	0x0000	PIE, INT6 Group Flag Register [Memory Mapped]	
	PIEIER7	0x0018	PIE, INT7 Group Enable Register [Memory Mapped]	
	PIEIFR7	0x0000	PIE, INT7 Group Flag Register [Memory Mapped]	
	PIEIER8	0x0003	PIE, INT8 Group Enable Register [Memory Mapped]	
	PIEIFR8	0x0000	PIE, INT8 Group Flag Register [Memory Mapped]	
	PIEIER9	0x000C	PIE, INT9 Group Enable Register [Memory Mapped]	
	PIEIFR9	0x0000	PIE, INT9 Group Flag Register [Memory Mapped]	
	PIEIER10	0x0001	PIE, INT10 Group Enable Register [Memory Mapped]	
	PIEIFR10	0x0000	PIE, INT10 Group Flag Register [Memory Mapped]	
	PIEIER11	0x0000	PIE, INT11 Group Enable Register [Memory Mapped]	
	PIEIFR11	0x0000	PIE, INT11 Group Flag Register [Memory Mapped]	
	PIEIER12	0x0000	PIE, INT12 Group Enable Register [Memory Mapped]	
	PIEIFR12	0x0000	PIE, INT12 Group Flag Register [Memory Mapped]	

eQEP2	eQEP2 Registers	
	QPOSCNT	0x00000000	eQEP Position Counter [Memory Mapped]	
	QPOSINIT	0x00000000	eQEP Initialization Position Count [Memory Mapped]	
	QPOSMAX	0x00000000	eQEP Maximum Position Count [Memory Mapped]	
	QPOSCMP	0x00000000	eQEP Position-compare [Memory Mapped]	
	QPOSILAT	0x00000000	eQEP Index Position Latch [Memory Mapped]	
	QPOSSLAT	0x00000000	eQEP Strobe Position Latch [Memory Mapped]	
	QPOSLAT	0x00000000	eQEP Position Latch [Memory Mapped]	
	QUTMR	0x00000000	eQEP Unit Timer [Memory Mapped]	
	QUPRD	0x00000000	eQEP Unit Period Register [Memory Mapped]	
	QWDTMR	0x0000	eQEP Watchdog Timer [Memory Mapped]	
	QWDPRD	0x0000	eQEP Watchdog Period Register [Memory Mapped]	
	QDECCTL	0x0000	eQEP Decoder Control Register [Memory Mapped]	
	QEPCTL	0x0000	eQEP Control Register [Memory Mapped]	
	QCAPCTL	0x0000	eQEP Capture Control Register [Memory Mapped]	
	QPOSCTL	0x0000	eQEP Position-compare Control Register [Memory Mapped]	
	QEINT	0x0000	eQEP Interrupt Enable Register [Memory Mapped]	
	QFLG	0x0000	eQEP Interrupt Flag Register [Memory Mapped]	
	QCLR	0x0000	eQEP Interrupt Clear Register [Memory Mapped]	
	QFRC	0x0000	eQEP Interrupt Force Register [Memory Mapped]	
	QEPSTS	0x0000	eQEP Status Register [Memory Mapped]	
	QCTMR	0x0000	eQEP Capture Timer [Memory Mapped]	
	QCPRD	0x0000	eQEP Capture Period Register [Memory Mapped]	
	QCTMRLAT	0x0000	eQEP Capture Timer Latch [Memory Mapped]	
	QCPRDLAT	0x0000	eQEP Capture Period Latch [Memory Mapped]	

SYSCTRL	System Control Registers	
	PLLSTS	0x0101	PLL Status Register [Memory Mapped]	
	HISPCP	0x0006	High-Speed Peripheral Clock Pre-Scaler Register [Memory Mapped]	
	LOSPCP	0x0004	Low-Speed Peripheral Clock Pre-Scaler Register [Memory Mapped]	
	PCLKCR0	0xC818	Peripheral Clock Control Register 0 [Memory Mapped]	
	PCLKCR1	0x0300	Peripheral Clock Control Register 1 [Memory Mapped]	
	LPMCR0	0x00FC	Low Power Mode Control Register 0 [Memory Mapped]	
	PCLKCR3	0x3F00	Peripheral Clock Control Register 3 [Memory Mapped]	
	PLLCR	0x000A	PLL Control Register [Memory Mapped]	
	SCSR	0x0005	System Control and Status Register [Memory Mapped]	
	WDCNTR	0x0000	Watchdog Counter Register [Memory Mapped]	
	WDKEY	0x00C0	Watchdog Reset Key Register [Memory Mapped]	
	WDCR	0x00C0	Watchdog Control Register [Memory Mapped]	
	MAPCNF	0x0000	ePWM/HRPWM Re-map Register [Memory Mapped]	
DEVEMU	Device Emulation Registers	
	DEVICECNF	0x080F006B	Device Configuration Register [Memory Mapped]	
	CLASSID	0x00EF	Class ID Register [Memory Mapped]	
	REVID	0x0001	Revision ID Register [Memory Mapped]	
	PROTSTART	0x0100	Block Protection Start Address Register [Memory Mapped]	
	PROTRANGE	0x00FF	Block Protection Range Address Register [Memory Mapped]	
	PARTID	0x00EF	Part ID Register [Memory Mapped]	
Core Registers	Core Registers	
	ACC	0xD800014F	Accumulator [Core]	
	P	0x0000014F	Product Register [Core]	
	XT	0x001500AD	Multiplicand Register [Core]	
	XAR0	0x00000000	Auxiliary Register 0 [Core]	
	XAR1	0x0000FFFF	Auxiliary Register 1 [Core]	
	XAR2	0x00000000	Auxiliary Register 2 [Core]	
	XAR3	0x00000000	Auxiliary Register 3 [Core]	
	XAR4	0x00006208	Auxiliary Register 4 [Core]	
	XAR5	0x00000066	Auxiliary Register 5 [Core]	
	XAR6	0x00000001	Auxiliary Register 6 [Core]	
	XAR7	0x0000CEC0	Auxiliary Register 7 [Core]	
	PC	0x3078E2	Program Counter [Core]	
	RPC	0x0063A8	Return Program Counter [Core]	
	ST0	0x00EC	Status Register 0 [Core]	
	ST1	0x8A1B	Status Register 1 [Core]	
	DP	0x033E	Data-Page Pointer [Core]	
	SP	0x0096	Stack Pointer [Core]	
	IER	0x0000	Interrupt Enable Register [Core]	
	IFR	0x0000	Interrupt Flag Register [Core]	
	DBGIER	0x0000	Debug Interrupt Enable Register [Core]	
	STF	0x00000628	Status Register for FPU [Memory Mapped]	
	R0L	0x00000000	Floating Point Unit R0L [Memory Mapped]	
	R0H	0xCB80014F	Floating Point Unit R0H [Memory Mapped]	
	R1L	0x00000000	Floating Point Unit R1L [Memory Mapped]	
	R1H	0x43350000	Floating Point Unit R1H [Memory Mapped]	
	R2L	0x00000000	Floating Point Unit R2L [Memory Mapped]	
	R2H	0x00000000	Floating Point Unit R2H [Memory Mapped]	
	R3L	0x00000000	Floating Point Unit R3L [Memory Mapped]	
	R3H	0x00000000	Floating Point Unit R3H [Memory Mapped]	
	R4L	0x00000000	Floating Point Unit R4L [Memory Mapped]	
	R4H	0x00000000	Floating Point Unit R4H [Memory Mapped]	
	R5L	0x00000000	Floating Point Unit R5L [Memory Mapped]	
	R5H	0x00000000	Floating Point Unit R5H [Memory Mapped]	
	R6L	0x00000000	Floating Point Unit R6L [Memory Mapped]	
	R6H	0x00000000	Floating Point Unit R6H [Memory Mapped]	
	R7L	0x00000000	Floating Point Unit R7L [Memory Mapped]	
	R7H	0x00000000	Floating Point Unit R7H [Memory Mapped]	
	RB	0x00000000	Repeat Block Register [Memory Mapped]	

 

FDC2214: Creating an Active Shield Output

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Part Number:FDC2214

I am currently trying to design an active shield for use with the FDC2214.  The datasheet briefly touches on this, but gives no examples or tips:

My design uses a custom parallel finger sensor, constructed from etched double-sided PCB material.  Instead of liquid level, it will sense the movement of a metal bar in a similar fashion.  I first attached my custom sensor to an FDC1004QEVM in the following manner:

This sensor arrangement works very well, and the active shielding truly does direct the electric field as mentioned in the numerous application notes.  Despite the great results, the FDC1004Q will not work for my application due to sample speed and resolution.  I need the 4ksps and the 28-bit resolution of the FDC2214.  Furthermore, my application will be extremely noisy, and the narrow band of the FDC2214 combined with active shielding should give me the best SNR.

Next, I attached the same custom sensor to the FDC2214EVM.  Per the datasheet, I attempted to create an active shield by buffering the INxA signal.  My prototype looked like this:

This arrangement performed poorly.  The sensitivity was much lower than the first arrangement. When the metal bar was stationary, the data also had much worse noise issues than the FDC1004Q.

So my questions are as follows:

1)  Am I doing something blatantly wrong?

2)  Arethere any reference designs, application notes, schematics, or other documents that deal with adding active shielding to the FDC2214?

3)  I have noticed the active shielding output of the FDC1004Q is "stair-stepped."  I assume this is a sine wave output from a DAC.  The INxA output on the FDCD2214 looks like a half analog sine.  Can I ever achieve the same level of active shielding with FDC2214, compared to the FDC1004Q?



Any suggestions are appreciated.

Thank you.

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