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TDP142: Aux Snooping

May 7, 2019, 12:24 pm
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Part Number:TDP142

We do not want to use AUX Snooping on the TDP142. The datasheet does not say what to do if you do not use the AUXP and AUXN pins.  Can they be left as NO-CONNECT or do they have to be strapped a certain way?

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Linux/TMDX654IDKEVM: Error while Cross-Compilation

May 7, 2019, 12:31 pm
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Part Number:TMDX654IDKEVM

Tool/software: Linux

Hello,

I am currently at this step for setting up the build environment for AM65x/DRA80xM :

http://software-dl.ti.com/processor-sdk-linux/esd/docs/05_03_00_07/linux/Overview_Getting_Started_Guide.html#gcc-toolchain

However, I get the following error when trying to cross-compile the sample helloworld appliaction:

Looking into the "wordsize.h" file I can see that it has the following processor directives:

#if __MHWORDSIZE == 32

#ifdef _MIPS_SIM

#if _MIPS_SIM == _ABIO32
#include <bits/wordsize-32.h>
#elif _MIPS_SIM == _ABIN32
#include <bits/wordsize-n32.h>
#else
#error "Unknown _MIPS_SIM"
#endif

#else /* _MIPS_SIM is not defined */
#include <bits/wordsize-32.h>
#endif

#elif __MHWORDSIZE == 64
#include <bits/wordsize-64.h>
#else
#error "Unknown __WORDSIZE detected"
#endif /* matches #if __WORDSIZE == 32 */

I am not sure at what step is __bpf__ defined or not.

However, after passing it as a compiler flag I get the following error:

Any help would be greatly appreciated.

Thanks,

Prateek

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CCS/TM4C123GH6PM: Download TivaWare_C_series-2.1.0.12573

May 7, 2019, 12:37 pm
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Part Number:TM4C123GH6PM

Tool/software: Code Composer Studio

I need to make a minor change to an old project, but I need to get an old version of TivaWare to compile it.  Is it possible to get TivaWare_C_series-2.1.0.12573.  I would migrate the project to the latest version of Code Composer and libraries, but management would prefer that I didn't spend a lot of time changing one timeout value on an old product.

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DRV8872: Is the any need for additional ESD or EMI components

May 7, 2019, 12:38 pm
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Part Number:DRV8872

Hi,

We are planning on using the DRV8872 to drive four 24V 2.2A brushed DC motors. Is there any need to place additional ESD protection on OUT1 and OUT2 or ferrite beads? There is a wifi/bluetooth and rf module on the board and I am concerned that the noise from the motor switching will interfere with the antennas.

Jason

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TINA/Spice/DRV8323: Footprints for DRV8323

May 7, 2019, 12:57 pm
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Part Number:DRV8323

Tool/software:TINA-TI or Spice Models

From the customer:

I thought I used to be able to get TI footprints straight from digikey but could not so I got it directly from your website.  I export the files from ultralibrarian and when I try to import the library into Altium if fails with "NIL PcbLibDoc".  Can you send me the library files direct for Altium? or send me a fixed .bxl file.

 

I am also trying to get the DLP9000 symbol and footprint and have the same problems.  Perhaps I am doing something wrong.  Also should note I am using Altium version 18

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CCS/UNIFLASH: Error trying to run uniflash_setup_3.4.1.00012.bin

May 7, 2019, 1:01 pm
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Part Number:UNIFLASH

Tool/software: Code Composer Studio

I am trying to install Uniflash under the instructions in section 6.2 of this tutorial (https://octavosystems.com/app_notes/osd335x-eeprom-during-boot/#_Toc382081428) of how to update EEPROM in one of your processors. After downloading the uniflash_3.4.1.00012_linux.tar.gz file from this website (http://processors.wiki.ti.com/index.php/CCS_UniFlash_v3.4.1_Release_Notes) I ran the following commands in terminal:

tar xvzf uniflash_3.4.1.00012_linux.tar.gz

cd Uniflash_3.4.1.00012_linux/

chmod +x uniflash_setup_3.4.1.00012.bin

./uniflash_setup_3.4.1.00012.bin

When running the execute command I get to read the terms and conditions and select the chips and debuggers I want to download. Then when it is downloading, I get this pop-up error.

Is there anything else I need to download to get this to work?

I am running Ubuntu 18.04.2 LTS on VMWare. 

Thanks in advanced!

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CCS/TM4C1294NCPDT: Lost of capability to debug...

May 7, 2019, 1:10 pm
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Part Number:TM4C1294NCPDT

Tool/software: Code Composer Studio

Hi, there,

Don't know which setting option I touched by accident, but now after I loaded the program to the micro, I can't setup break point any more

See below, I can still single stepping through the program, but when I toggle the a break point, it indicates breakpoint not available

Thanks for any help!

DC

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RTOS/CC2652R: How to best read a digital signal.. GPIO Interupt?

May 7, 2019, 1:13 pm
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Part Number:CC2652R

Tool/software: TI-RTOS

Hello everyone.  I'm a novice for TI products but I've been working on this quite a while. I am trying to interface with a temperature sensor that has a 20 bit digital signal in response to a 18ms pull down then 40ms pull up start signal.  I have written the code to initiate the start signal and then set the GPIO to input with both edge detections and a callback function.  I'm trying to capture the length of each pullup by the temp sensor since this determines whether or not it is a 1 or a 0.  How would I do a time stamp of each edge so that I can accomplish that delta time?  Am I on the right track?

By the way, since I'm using a MAC the sensor controller studio is out.  I've tried using Wine to make it work and it is just too much of a pain.  I figured I could implement this digital reading fairly easily but I'm not sure I'm approaching it correctly.

thanks for any input.

Travis

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CCS/TMS320C6748: TMS320c6748 LCDK Cache and EDMA Problems

May 7, 2019, 1:31 pm
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Part Number:TMS320C6748

Tool/software: Code Composer Studio

Greetings,

I've been working with the EDMA for sometime now with some success.  Implementing the EDMA with the Cache has become a significant problem however particularly on the RX buffers of the EDMA.

Currently I've been using the CSLR Cache library which has worked well for significantly speeding up many routines when receiving data through the EDMA and have experienced no problem when receiving data via the EDMA and initializing the cache prior. When transitioning to the transmit routine, it seems as though despite my output buffers being correct, the EDMA is dropping sometimes hundreds of samples, and sometimes cutting data off at the end of the routine.  It seems to be caused by the Cache routine and works fine when the cache is not enabled.  However, the cache is necessary and I'd rather not write my own code that moves my necessary code back and fourth out of L2 and L1 memory and would rather use and already developed cache routine.

I've read through the cache user manual on the TMS320C674x processors about coherence with the EDMA.  Although, more easily I feel as though it would be more ideal to place the output TX Buffers for the EDMA in a noncacheable portion of memory (Which I've tried by using Pragma statements but couldn't figure out how to change what level of SDRAM is Cachable)

Here is the code I use to initialize the Cache:

void disable_cache (void)
{
    // Set DDR2 (MAR 192 - 223) as not cacheable
    for(counter = 192; counter < 224; counter++)
        CSL_FINST(cacheRegs->MAR[counter], CACHE_MAR_PC, NOT_CACHEABLE);

    // Disable L1P
    CSL_FINST(cacheRegs->L1PCFG, CACHE_L1PCFG_MODE, DISABLE);
    stall = cacheRegs->L1PCFG;

    // Disable L1D
    CSL_FINST(cacheRegs->L1DCFG, CACHE_L1DCFG_MODE, DISABLE);
    stall = cacheRegs->L1DCFG;

    // Disable L2
    CSL_FINST(cacheRegs->L2CFG, CACHE_L2CFG_MODE, DISABLE);
    stall = cacheRegs->L2CFG;
}/* disable_cache */

void setup_DDR2_cache (void)
{
    // Set SDRAM (MAR 192 - 223) as cacheable
    for(counter = 192; counter < 224; counter++)
        CSL_FINST(cacheRegs->MAR[counter], CACHE_MAR_PC, CACHEABLE);
}/* setup_SDRAM_cache */



void enable_L1 (void)
{
    // Set L1P size to 32K
    CSL_FINST(cacheRegs->L1PCFG, CACHE_L1PCFG_MODE, 32K);
    stall = cacheRegs->L1PCFG;

    // Set L1D size to 32K
    CSL_FINST(cacheRegs->L1DCFG, CACHE_L1DCFG_MODE, 32K);
    stall = cacheRegs->L1DCFG;
}/* enable_L1 */

void enable_L2 (void)
{
    // Set L2 size to 256K
    CSL_FINST(cacheRegs->L2CFG, CACHE_L2CFG_MODE, 128K);
    stall = cacheRegs->L2CFG;
}/* enable_L2 */

Can someone tell me what is wrong with this cache routine or point me to one that is effective from some kind of TI software?

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LMK05318EVM: 1 PPS input configuration, Synchronized output, DPLL does not lock

May 7, 2019, 1:33 pm
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Part Number:LMK05318EVM

We are using:

 

TICS Pro v1.6.9.0

Build Date: 11-Dec-18

Part Version: 2018-12-11, v0.7.0, scripts=ee042ab1a7

 

We have a single-ended CMOS 3.3V PPS pulse connected to J6, PRIREF_P. PRIREF_N, the center pin of J7 is grounded. Using an oscilloscope connected across R56 and R57, I can see the PPS pulse which is 50 milliseconds wide. When I read status, LOPL_DPLL (phase lock lost) and LOFL_DPLL (frequency lock lost) are always set. Eventually, we will connect a second PPS input to SECREF_P. Right now, only PRIREF_P has a PPS pulse connected.

 

I can observe the 1 HZ PPS output on CH7, and the 10MHZ output on the other channels. However, the DPLL is not locked.

 

1)      I need the PPS output and 10 MHZ output in phase and locked to the PPS input. How do I accomplish this?

2)      It appears that “9.3.7.2.6 Phase Valid Monitor for 1-PPS Inputs” of the datasheet is what I need to do. However, I don’t see how the settings provided in 9.3.7.2.6 of the datasheet correspond to anything in the LMK05318EVM. Frustrating that the terminology in the datasheet does not match up with that in the LMK05318EVM.

 

 

 

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HDC2010: Datasheet Typo?

May 7, 2019, 1:37 pm
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Part Number:HDC2010

In the datasheet (http://www.ti.com/lit/ds/symlink/hdc2010.pdf) in section 7.6.18 there appears to be an error. You list your manufacturer's ID as "IT" when I would assume you meant "TI". The LSB is listed as as 0x49 = "I" in ASCII and then listed the MSB as 0x54 = "T" but in 7.6.18 you mention the word as 0x4954 or "IT". Seems wrong.

Not the biggest deal in the world but might save someone else 5 minutes.

Jason

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TAS5825M: BTL & PBTL configuration

May 7, 2019, 1:38 pm
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Part Number:TAS5825M

Hi team,

I'm interested in using TAS5825M in BTL and PBTL. I'd like to design one board that can support both configurations with some simple hardware modifications (jumpers or similar). Here are my questions:

  • The TAS5825MEVM supports BTL and PBTL, according to the User Guide. It seems U2 is the device/circuit designated for PBTL evaluation, based on the increased PVDD capacitance. If I'm using the U2 circuit in BTL and want to change over to PBTL...
    • Do I bridge OUT3+/OUT4+ and OUT3-/OUT4- or do I bridge OUT3+/- and OUT4+/-?
    • Are there any other changes that would need to be made (in hardware), such as removing C26 and C31?
  • This U2 circuit also support BTL operation, correct? If so, I think I can use this circuit as a template for my design and implement Post-Filter PBTL--is that correct?

Thanks,

Brian

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ISO7721: Digital Isolator Instead of Optocoupler

May 7, 2019, 1:57 pm
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Part Number:ISO7721

Hi everyone,

I have an application for my microcontroller application. I need to enable some pins related with microcontroller but I don't want to use optocoupler. Instead of it, I would like to use digital isolator. I attached the my application schematic. Please check. 

Instead of using optocoupler like in the schematic, I want to use digital isolator if possible. 

Thanks!

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DS90UB953-Q1: how to feed the data in order for DS90UB954 to output video on 2 lanes of the CSI-2 output?

May 7, 2019, 1:57 pm
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Part Number:DS90UB953-Q1

Team, 

Question from customer:

I have a DS90UB953 sending data over coax to a DS90UB954.  The data is 1920 x 1080 video, 30fps, YUV422.  I need the DS90UB954 to output the video on 2 lanes of the CSI-2 output.  Do I have to feed the data into the DS90UB953 as 2 lanes of CSI-2 data to achieve this 954 output?

Thanks!

Viktorija

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TIDA-00548: Source Code for Reference Design

May 7, 2019, 1:58 pm
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Part Number:TIDA-00548

Hello team,

Is there any source code available for TIDA-00548?  My customer is fabricating the boards for evaluation and will need the software to test specifications.

Thanks!

Errol

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OPA1678: Noise Simulation

May 7, 2019, 2:02 pm
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Part Number:OPA1678

The OPA1678 noise is spec'ed for 4.5 nV/sqrt(Hz) at 1 kHz.

Using the following circuit in TINA, where the VG1 source = 0V,

and performing Analysis->Noise Analysis->Total Noise returns this result:

I expected this value to be closer to 4.5 nV * sqrt(1000 Hz) = 126 nV.  

Using the Analysis->Noise Analysis->Input Noise returns,

Which also returns a value higher than expected.

Can you please let me know what I'm doing wrong here?  Is it related to the Flicker Noise of the device?

These noise voltages are RMS, as confirmed by simulating the noise of plain resistors.

Thanks, Best, Steve

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CCS/IWR1642BOOST: IWR1642BOOST raw data access protocol

May 7, 2019, 2:06 pm
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Part Number:IWR1642BOOST

Tool/software: Code Composer Studio

Hi, experts:

I use IWR1642boost board and try to capture raw data.

my question is:

1. the EVM boards from Ti generally are not size matched.

2. I try to design my own FPGA board with desired size or may integrate the front board together.

3. I can connect all the 60pin signal to my own FPGA board.

4. does this boost board have any protocol or other rules to get the raw data?

 

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DRA77P: Android 8.1 how to integrate BT stack

May 7, 2019, 2:16 pm
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Part Number:DRA77P

Hello everybody , 

how to integrate BT stack ?   I  do not see it enabled on WL19 mdoule

what about if I am using broadcom module , due to to final customer needs ?

any suggestion on how to proceed ?

thank you 

best regards

Carlo

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Compiler/MSP430FR5969: GCC compiler saves more registers than required in an ISR that calls another function

May 7, 2019, 2:21 pm
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Part Number:MSP430FR5969

Tool/software: TI C/C++ Compiler

I have complained about this before but it seems that it wasn't fixed in the latest release. Even a simple ISR that only calls another function starts with "pushm #12,r15" when all it needs is "pushm #4,r15".

The called function is required to save and restore any registers below r12 that it uses so this just wastes stack space and time.

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WEBENCH® Tools/BQ25710: BQ25710 EVM schematic diagram and gerber

May 7, 2019, 2:24 pm
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Part Number:BQ25710

Tool/software: WEBENCH® Design Tools

Hi All,

we're planning to use the BQ25710 in a UPS system for a medical device, which has to charge a 12V 9A lead acid battery from a 12V 5A AC/DC adapter.

(I tried to use Webench to simulate the circuit but when I put the project's data it doesn't show any solution...)

I would like to get the BQ25710 EVM project files (schematic+ gerber). Are these available somewere?

Thanks

 

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