Part Number:ADS8910B
We're having some issues with the SPI interface on our ADS8910B ADC. Our board uses a TI MSP342E401Y MCU as the host controller for the ADC. We have a legacy SPI port hooked up to the SDI pin of the ADS8910B to write to the setup registers and put the device in quad-SPI mode. We then have a separate quad-SPI port on the MCU hooked up to the SDO lines of the ADS8910B to read data out.
Sometimes the part gets in a state where the data is not lining up with the clock. After some debugging I discovered that this is due to the RVS pin on the ADS8910B outputting a clock, and the data lines being synced to that internal ADC clock, rather than the SCLK pin being driven by the MCU.
According to the ADS8910B datasheet, the RVS pin will output a clock only in source synchronous mode, which is enabled by setting bits [1:0] of SDO_CNTL to 11.
Part of our initialization routine is to set this register, so it seems that somehow this register is being corrupted or those bits are somehow being set in another way. Once we go into quad-SPI mode it does not seem that we have any way of writing to the ADS8910B other than through the SDI line, which we hold low after writing the initial registers to set quad-SPI mode.
Any ideas on what could be going on here? On one of our boards this happens intermittently, and on another it seems to happen every time we cycle power.
