LM48511: LM48511 Question.
AWR1642: 80GHz Capable Regulatory Test Labs
Part Number:AWR1642
Hello: The 76-81GHz frequency range is not one supported by the many regulatory and certification test labs. The frequency is simply above the 40GHz to 50GHz upper limit of most labs. Can TI point to some labs that can perform regulatory testing on short range radars using chips such as the AWR1642?
Linux/AM3352: Slow boot continues through WDT
Part Number:AM3352
Tool/software: Linux
We've had a design in the field for 3 years that exhibits a 'slow' boot condition during which normal execution occurs at maybe 1/20 of the expected speed. It occurs on less than 1/10 of a percent of fielded units. It's slow enough where the WDT fires and creates a WDT reset event. However, the slow boot condition continues and the cycle repeats.. forever, until POR. Our work around has been to check the reset reason in u-boot and issue a reset from the PMIC if the reset reason is WDT. This resolves the issue and the device is able to boot normally after initially failing. However, the over all boot time is creating problems and we need to understand why this is occurring and what more can be done to avoid the situation, what is root cause? In one unit that that we've been able to capture the condition it seems to be related to CKE on the SDRAM. During a normal boot CKE show continuous clocking, however in the 'slow boot' condition CKE operates in a busting manner. See below. This design was reviewed 3 years ago by TI and a Hyperlynx simulation was performed on the SDRAM to ensure proper timing. This issue doesn't seem to be related to any environmental condition or any unusual electrical condition such as EMI or ESD.
LM1881: Review replacement parts
HD3SS212: Bidirectional MUX?
AWR1243: 40MHz crystal oscillator of AWR1243 chip
Part Number:AWR1243
Hi,
I am interested in purchasing the awr1243 for radar applications.these days i have got some problems, detaily as follows
1) I directly charged the 1.3-V power port with a 1.3V but the 40MHz crystal oscillator not work,what could be the problem ? As we know that for the 1.3-V power port there's a 1-V bypass mode,Does the problem have anything to do with it ?Or must it be controlled? How to control it ?
2) When the AWR1243 chip is used in Slave mode.the clock of CLKP is provided by outside,then the CLKM pin needs to be grounded.Can the CLKM pin be directly grounded or must be grouned through the capacitor AC?
TAS5754M: PPC3 software download requested
Part Number:TAS5754M
Dear TI team,
Could you help to grant the access to PPC3 for my customer?
Please send me a mail offline, and I will give you my customer's myTI account.
Here is my mail: benkuo@ti.com
Thanks!
Ben
CCS/CC2650: CC2650
Part Number:CC2650
Tool/software: Code Composer Studio
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ONET1151P: Is ONET1151P can be applied to 10G SFP+ER
TPS2372: DEN pin resistor selection
Part Number:TPS2372
Hi Tom,
The datasheet shows that connect a 24.9k ohm resistor from DEN to VDD.
But we asked you before, and I suggest we can connect a 27.4k ohm resistor from DEN to VDD.
Could you kindly explain the reason we should modify it?
Because the sifod test show Rdet, Rdet_final, Rdet_at_Vmin and Rdet_at_Vmax are fail.
I think it is because this modification cause test fail.
LM120: Enquiry for when RoHs part started (QAA505D)
Part Number:LM120
Hi,
Please help to advise when this part LM120H-15/NOPB starts manufacturing as customer would like to know when RoHs part started to have.
Thanks & looking forward to your reply soon.
Regards
TAS5805M: Output power limiy
INA230: Setting the R_SHUNT value.
TLV320AIC3262: How to Enable ASRC Function in TLV320AIC3262
Part Number:TLV320AIC3262
Hi Sirs,
As title, we saw an ASRC description in the AIC3262 application note (slau309.pdf) page 122, however, we still don;t know to bring it up. Can we enable the ASRC function by I2C instructions or by DSP components in PurePath Studio?
Thank you and Best regards,
Wayne Chen
05/02/2019
TAS5756M: IC occasionally ignores SPK_GAIN_FREQ setting and goes to 14dB/384kHz
Part Number:TAS5756M
https://e2e.ti.com/support/audio/f/6/t/551486?tisearch=e2e-sitesearch&keymatch=TAS5756%20frequency
Referring to an old post.
This problem cropped up in my design as well. Chance is about 20% on every power cycle.
SPK_GAIN_FREQ actually glitches to 14dB/384kHz, volume output is noticably softer than normal condition.
All 6 boards exhibit the same problem.
Board only runs in BTL mode, so inductors used are TOKO, 931AS-4R7M as per EVM.
Board total idle current: 0.2A @ 24V @ 768kHz, output inductor temperature stable at ~60°C / IC package temp stable at 56~58°C.
Board total idle current during abnormal cycle: 0.39A @ 24V @ 384kHz, inductor temperature rises to 135°C+ IC temp rises up to 130+°C.
Schematic largely follows the EVM but with the addition of 390uF PBTL caps.
SPK_GAIN_FREQ is set to 20dB/768kHz as per datasheet. SPK_GAIN_FREQ voltage is measured at ~5.7V. Scope shows an a smooth transition towards 5.7V without glitches.
I have desoldered and double checked all the capacitors used. All uF values are as per schematic.
I have tried adding a cap from 10nF up to 330nF to the SPK_GAIN_FREQ but it still triggers the abnormal condition. (Values above 330nF would trigger the TAS into 20dB/576 kHz with increased current)
I have tried resetting the I2S by means of holding I2S Master in reset and providing no MCLK; then re-apply MCLK and unassert I2S Master reset. There is still a chance to trigger abnormal condition.
I have tried the above (holding I2S Master in reset then unassert reset), but with MCLK always active, to no avail.
My 3V3 regulator was 29cm! away from the classD with 12mil/0.3mm trace width so, I have tried kludging a different 3v3 regulator just 3cm away from the ClassD. It does improve the 3v3 Vpk-pk, but the abnormal SPK_GAIN_FREQ still triggers.
I have tried adding a pi filter to the 24V, 5V, and 3V3 to no avail.
I have tried adding 2x 22AWG wires for 24V/ground return from the classD and towards incoming power connector to no avail.
I have tried modifying the soft-start function on the LM5010 5V regulator to delay to ~300ms to allow the 24V to stablise no avail.
I have tried prolonging the voltage supervisor time to 1.1s (before enabling the I2S Master) to no avail.
Since the design daisy-chains the I2S devices; TAS I2S Slave to another I2S Slave; I have tried cutting the I2S traces to feed I2S only into the TAS5756M to no avail. Abnormal SPK_GAIN_FREQ still occurs.
All I2S lines are buffered. There is no distortion or glitching or intermittent pop during audio playback.
I have tried replacing the TOKO inductors with the PBTL 4.7uH/13A inductors to no avail. Current is noticeably lowered but abnormal SPK_GAIN_FRQ still occurs.
PSU is using a lab supply. Also occurs with 24VDC adaptor.
If I slow ramp to 24V with the lab supply from 0V to 24V over 2~3 seconds, the abnonrmal SPK_GAIN_FREQ would not happen.
As per old thread, lower voltage also triggers abnormal SPK_GAIN/FREQ condition.
Help.
PCB
Linux/OPT3001: Do we have OPT3001IDNPQ1 source code?
Part Number:OPT3001
Tool/software: Linux
Hi Sir
Do we have OPT3001IDNPQ1 source code?
like as below link.
http://www.ti.com/tool/lm75sw-linux
Bogey
WEBENCH® Tools/UCC256301: How to start using the LLC controller UCC52630?
Part Number:UCC256301
Tool/software: WEBENCH® Design Tools
Hello, I am now trying to ues the LLC controller-UCC256301. Some problems has puzzled me a lot recently:
1/When I impose 15V-VCC and 3V power supply on the Pin3(VCC pin) and Pin-4(BLK pin) respectively, nothing such as low side driving pulse occured, and the voltage level of Pin12(RVCC pin) is always zero. I am wondering WHAT ELSE actions should be taken to get the controller work.
2/If I use the UCC256301 as a controller of a wide range voltage souce(36VDC~110VDC) DC-DC converter, How Should I configure the Pin1(HV pin)? Will it be OK to connect it directly to the Ground?
INA233: INA233 I2C COMMUNICATION
Part Number:INA233
I m developing an application where i need to read ina233 bus voltage , current etc with an isolator ISO1541 in between MCU and INA233. So i2c communication happens between mcu----1SO1541----INA233.
For testing purpose i am trying to read the MFID (Manufacturer id from reg address 0x88) . But I am not able to read the complete 2 byte data, I just receive the (2,255) from the IC.i.e second byte read is always high.
Sharing the code with functions :
data = read_ina(0x88); // for reading the data from the reg address 0x88.
unsigned char read_ina(unsigned char address)
{
unsigned int temp=0,temp2=0;
unsigned char add_lo = 0,add_hi = 0;
unsigned char reg_address = 0;
reg_address = address;
start1(); delay_us(300);
write_byte_ina233(0x88); //delay_us(300); //slave address + write bit
write_byte_address_ina233(reg_address); //delay_us(300); // register address
stop1(); delay_us(300);
start1(); delay_us(300);
write_byte_ina233(0x89); trisb.f3 = 1;delay_us(300); //slave address + read bit
ina_data_lsb = read_byte_ina233_ack(); //delay_us(300);
ina_data_msb = read_byte_ina233_nack(); //delay_us(300);
stop1(); delay_us(300);
return(ina_data_msb);
}
Other functions are as follows :
void start1(void)
{
trisb.f3 = 0;delay_us(300);
sda_iso1541 = 1 ; delay_us(300);
scl_iso1541 = 1; delay_us(300);
sda_iso1541 = 0 ; delay_us(300);
scl_iso1541 = 0; delay_us(300);
}
void stop1(void)
{
trisb.f3 = 0;delay_us(300);
sda_iso1541 = 0 ; delay_us(300);
scl_iso1541 = 1; delay_us(300);
sda_iso1541 = 1 ; delay_us(300);
}
void write_byte_ina233(unsigned char val)
{
unsigned char x=0;
trisb.f3 = 0;delay_us(500);
for(x=0;x<=7;x++)
{
if(val & 0x80)
{sda_iso1541 =1;}
else
{sda_iso1541 =0;}
delay_us(500);
scl_iso1541 =1;
delay_us(500);
scl_iso1541 =0;
delay_us(500);
val = val << 1;
}
trisb.f3 = 1;delay_us(500);
scl_iso1541 =1;
delay_us(500);
scl_iso1541 =0;
delay_us(500);
//trisb.f3 = 1;delay_us(300);
}
void write_byte_address_ina233(unsigned char val)
{
unsigned char x=0;
trisb.f3 = 0;delay_us(500);
for(x=0;x<=7;x++)
{
if(val & 0x80)
{sda_iso1541 =1;}
else
{sda_iso1541 =0;}
delay_us(500);
scl_iso1541 =1;
delay_us(500);
scl_iso1541 =0;
delay_us(500);
val = val << 1;
}
trisb.f3 = 1;delay_us(500);
scl_iso1541 =1;
delay_us(500);
scl_iso1541 =0;
delay_us(500);
//trisb.f3 = 1;delay_us(300);
}
unsigned char read_byte_ina233_ack(void)
{
unsigned char x=0,val=0;
//trisb.f3 = 1;
delay_us(300);
for(x=0;x<=7;x++)
{
val = val << 1 ;
delay_us(500);
val = val | sda_iso1541;
delay_us(500);
scl_iso1541 =1;
delay_us(500);
scl_iso1541 =0;
delay_us(500);
}
delay_us(500);
scl_iso1541 =1;
delay_us(500);
scl_iso1541 =0;
delay_us(500);
return(val);
}
unsigned char read_byte_ina233_nack(void)
{
unsigned char x=0,val=0;
//trisb.f3 = 1;
//delay_us(300);
for(x=0;x<=7;x++)
{
val = val << 1 ;
delay_us(500);
val = val | sda_iso1541;
delay_us(500);
scl_iso1541 = 1;
delay_us(500);
scl_iso1541 = 0;
delay_us(500);
}
//trisb.f3 =0;delay_us(100);
return(val);
}
Kindly let me know for some issue with the code .
Or please send me sample code for reading some register value.
TPS65987D: Intel thoundbolt 3 PD
PMP21479: Peak load spec
Part Number:PMP21479
If we don't need PD solution, only a simple 65W 19V output adaptor, can it handle 200% peak load for 2mS?