Part Number:TMS320F28379D
I am using a configuration where the EPWM2A is triggering ADCD conversions. ADCDINT! is enabled and each ADCDINT1 should trigger a DMA burst of 1 x 16bit read from AdcdResultRegs.ADCRESULT0. A DMA transfer consists of 100 such reads from the same register and then the DMA should interrupt the CPU at the end of the transfer.
My observation is that the first DMA trigger is happening and the first ADC result is read. However, the ADCINT1FLG is not being cleared at this point and this stops any further interrupts being generated by the ADC. My understanding is that "Upon receipt of a peripheral interrupt event signal, the DMA will automatically send a clear signal to the interrupt source so that subsequent interrupt events will occur."
So, I thought all I had to do was
DmaClaSrcSelRegs.DMACHSRCSEL1.bit.CH1 = DMA_ADCDINT1;
and the DMA would take care of clearing the interrupt on the ADC.
I have confirmed this "stuck int flag" is the cause of the issue by hacking the software to clear the ADC flag while waiting for the buffer to fill :
while(RxBufReady == RX_NOT_READY)
{
AdcdRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; // Clear ADC INT1 flag
}
By clearing this flag in SW (which is obviously undesirable in the real system) I get the DMA transfer to complete and the DMA ISR is called. Without the line to clear the flag, the DMA transfer never completes.
Another way I confirmed the stuck flag issue was to set the ADCINTFLGCLR in CCS. Every time I cleared the flag manually one more DMA read took place and then I was back in the same position with the flag set and no further ADC interrupts.
So, am I missing something here ?? I thought by triggering the DMA on ADCDINT1 is would automatically clear the INTFLG for me??
Regards
Lorraine
