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WEBENCH® Tools/TPS2410: TPS241x issue

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Part Number:TPS2410

Tool/software: WEBENCH® Design Tools

      I am now working on a switch product with a dual-power solution, and I need to do the redundant backup design of power supply.

 Product demand is as bellow:

Two-way 12V voltage input, the output of 12V to the load , the load power is about 30W.

Two-way input power supply mode can be the main and backup mode or load balancing mode.

When the power input of one circuit in the two-way 12V input power fails, the chip can output an alarm signal.

According to TI's website, there are four tps2410/1/2/3 chips,I wonder if there are other chips available? Could you please give suggestions on delivery time, cost performance and so on? THX.

Best Regards!


TUSB1210: It seems output data & clock violate ULPI interface timing requirements

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Part Number:TUSB1210

Hello,

One of my customer reported clock timing violation matters while applying TUSB1210 for ULPI interface w/  Zynq(xilinx).

need to clarify the definition of the Table 5-4 in the datasheet.  attached the schematic and measured waveforms for your reference.  would you please review them and advise me ?   Thank in adv. if you can mark exact measurements for Tsetup & Thold on the waveforms. 

 - measured pins :  Clock(pin 26), Data2(pin 5), DIR(pin 31) 

(Please visit the site to view this file)

WEBENCH® Tools/TPS92518: TPS92518 issues

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Part Number:TPS92518

Tool/software: WEBENCH® Design Tools

I am looking for an LED driver IC.

Requirements are as follows :(drive single LED)

The input voltage is 5V.

LED power supply: 2.8v ~ 3.2v

LED current: 700MA.

LED power: 2W

Need to control brightness adjustment.

Dosage: 3PCS.

Main applications: drone lens lighting.

Please help to recommend.THX.

Best Regards

TUSB1210: It seems output data & clock violate ULPI interface timing requirements

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Part Number:TUSB1210

(Please visit the site to view this file)

Hello,

One of my customer reported clock timing violation matters while applying TUSB1210 for ULPI interface w/ Zynq(xilinx).

need to clarify the definition of the Table 5-4 in the datasheet. attached the schematic and measured waveforms for your reference. would you please review them and advise me ?   Thank in adv. if you can mark exact measurements for Tsetup & Thold on the waveforms.

- measured pins : Clock(pin 26), Data2(pin 5), DIR(pin 31)

CC3220S: SPI miss 2 bytes between fh8610 and CC3220

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Part Number:CC3220S

Hi,

SPI Parameters: dataSize 16bit, clock 6MHz, polarity 0, phase 0

Issue Detail: When the FH8610(slave) and CC3220 (master) communicate by SPI, the original buf is "123456789123456789", but the actual sending is "1256914589". In other words, 2 bytes are sent successfully, 2 bytes are lost,2 bytes are sent successfully, 2 bytes are lost ......  But receiving data from CC3220 is normal.

Do you have an idea what causes the SPI issue?

thanks

Kevin

/*********************FH8610 code**********************/
void config_spi( int id )
{
    Spi_Enable( id, 0 );
    Spi_SetFrameFormat( id, SPI_MOTOROLA_MODE );
    Spi_SetPolarity( id, SPI_POLARITY_LOW );
    Spi_SetPhase( id, SPI_TXR_PHASE );
    Spi_SetDataSize( id, ((SPI_UNIT_TR_BITS == 8) ? SPI_DATA_SIZE_8BIT : 0xf));
    Spi_SetTransferMode( id, SPI_TX_RX_MODE );
    Spi_DisableIrq( id, SPI_IRQ_ALL );
    Spi_SetDmaTxDataLevel( id, 12 );        //12
    Spi_SetDmaRxDataLevel( id, 3 );         //3
    Spi_SetDmaControlDisable( id, SPI_DMA_RX_POS | SPI_DMA_TX_POS );
     
}
static void config_dma_rx( int ch )
{
    Dma_ClearIsrBit(ch,(DMA_INTT_TXR | DMA_INTT_BLOCK | DMA_INTT_SOURCE | DMA_INTT_DEST | DMA_INTT_ERR)); // new add
     
    Dma_SetTxrType( ch, DMA_TTFC_P2M_DMAC );
    Dma_SetSrcWidth( ch, ((SPI_UNIT_TR_BITS == 8) ? DMA_TXR_8BITS : DMA_TXR_16BITS));
    Dma_SetSrcSize( ch, DMA_BURST_4 );
    Dma_SetDstWidth( ch, DMA_TXR_32BITS );  //DMA_TXR_32BITS
    Dma_SetDstSize( ch, DMA_BURST_4 );
    Dma_SetSrcIncDirection( ch, DMA_DIR_UNCHG );
    Dma_SetDstIncDirection( ch, DMA_DIR_INC );
    Dma_SetSrcHsMode( ch, DMA_HSMODE_HARDWARE );
    Dma_SetFifoMode( ch, 1 );
    Dma_SetFlowCtrl( ch, 1 );
    Dma_SetHProt( ch, 6 );
    Dma_EnableIsrBit( ch, DMA_INTT_BLOCK );
}
 
static void config_dma_tx( int ch )
{
    Dma_ClearIsrBit(ch,(DMA_INTT_TXR | DMA_INTT_BLOCK | DMA_INTT_SOURCE | DMA_INTT_DEST | DMA_INTT_ERR));// new add
 
    Dma_SetTxrType( ch, DMA_TTFC_M2P_DMAC );
    Dma_SetSrcWidth( ch, DMA_TXR_32BITS );  //DMA_TXR_32BITS
    Dma_SetSrcSize( ch, DMA_BURST_4 );
    Dma_SetDstWidth( ch, ((SPI_UNIT_TR_BITS == 8) ? DMA_TXR_8BITS : DMA_TXR_16BITS));
    Dma_SetDstSize( ch, DMA_BURST_4 );
    Dma_SetSrcIncDirection( ch, DMA_DIR_INC );
    Dma_SetDstIncDirection( ch, DMA_DIR_UNCHG );
    Dma_SetDstHsMode( ch, DMA_HSMODE_HARDWARE );
    Dma_SetFifoMode( ch, 1 );
    Dma_SetFlowCtrl( ch, 1 );
    Dma_SetHProt( ch, 6 );
    Dma_EnableIsrBit( ch, DMA_INTT_BLOCK );
}
int spi_one_cycle_transfer(UINT8 idx,const UINT8 *tx_buff,UINT8 *rx_buff,UINT32 len)
{
    UINT8 ret;
     
//1.wait master pull up ack gpio
    OSSemPend(sem_wifi_ack_gpio, 0, &ret );
//2.pull up slaver ack gpio
    //Gpio_SetPortX(HW_HELP_SPI_GPIO,1);
//3.block to exchange data
    config_spi(g_spi_chan);
    Spi_SetDmaControlEnable( idx, SPI_DMA_RX_POS | SPI_DMA_TX_POS );
    Spi_Enable( g_spi_chan, 1 );
     
 
    //config tx
    config_dma_tx( g_spitx_dma_chan );
    Dma_SetSrcAddress( g_spitx_dma_chan, (unsigned int)tx_buff );
    Dma_SetDstAddress( g_spitx_dma_chan, SPI_DATA_REG );
    Dma_SetDstPer( g_spitx_dma_chan, DMA_HSP_SPI2TX );
    Dma_SetTxrSize( g_spitx_dma_chan, len >> 2 );
    Dma_EnableChan( g_spitx_dma_chan );
     
    //config rx
    config_dma_rx( g_spirx_dma_chan );
    Dma_SetSrcAddress( g_spirx_dma_chan, SPI_DATA_REG );
    Dma_SetDstAddress( g_spirx_dma_chan, (unsigned int)rx_buff );
    Dma_SetSrcPer( g_spirx_dma_chan, DMA_HSP_SPI2RX );
    Dma_SetTxrSize( g_spirx_dma_chan, (SPI_UNIT_TR_BITS == 8) ? len : (len >> 1));
    Dma_EnableChan( g_spirx_dma_chan );
 
     
 
    Gpio_SetPortX(HW_HELP_SPI_GPIO,1);
    OSSemPend(g_dmaSpiRx_done, 0, &ret);    //don't wait forever,need to change
 
//4.pull down slaver ack gpio
    Gpio_SetPortX(HW_HELP_SPI_GPIO,0);
 
    return 0;
 
}
unsigned char slaveRxBuff[1200] = {0};
unsigned char slaveTxBuff[1200] = "123456789123456789"; 
static void _spiFrCCThreadFun(void *param)
{   
    UINT8 ret;
 
 
    sem_wifi_ack_gpio = OSSemCreate(0);
     
    while(1)
    {
//1.check msg queue first.if it have,mean dsp want to send something initiative
     
//2.package data
     
//3.exchange data   
    spi_one_cycle_transfer(g_spi_chan, slaveTxBuff, slaveRxBuff, 600);
    uprintf("_spiFrCCThreadFun slaveRxBuff=%x-%x-%x-%x-%x-%x\n",slaveRxBuff[0],
        slaveRxBuff[1],slaveRxBuff[2],slaveRxBuff[3],slaveRxBuff[4],slaveRxBuff[5]);
//4.unpackage data
     
//5.analysis data
     
    }
}

TLV5616: Cannot output 0~5v. The reference input voltage is 3.3v, and the supply voltage is 5v.

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Part Number:TLV5616

Hi,

I am trying to make tlv5616 outputs 0~5v. But it just can output 0~3.84V.  My schematic is shown in figure 1. 

The pin “SPI1_MOSI" is PA7, "SPI1_SCK" is PA5 and "SPI1_SS" is PA4.  I choose to use the "Microwire port " mentioned in the datasheet as shown in figure 2.

I can confirm my code is correct because when I give the different data to tlv5616, it can output the expected voltage as long as the expected voltage is below 3.84v. 

Any thoughts on what's going wrong?

                                                       Figure1: The schematic

TMS320F28377D: What's the difference between SBF28377DZWTQR and TMS320F28377DZWTQR?

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Part Number:TMS320F28377D

Hi Albert

I is using SBF28377DZWTQR and TMS320F28377DZWTQR, SBF28377DZWTQR is used for testing during the r&d, so I wants to continue using SBF28377DZWTQR in mass production.

 

Question 1

Will SBF28377DZWTQR's supply be cancelled within 3 years?

 

Question 2

What's the difference between SBF28377DZWTQR and TMS320F28377DZWTQR? I cannot find the information of SBF28377DZWTQR on the website of TI. Is it just a matter of renaming?

 

 

TUSB522P: Kaby lake and Apollo lake

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Part Number:TUSB522P

Hi Sirs,

Sorry to bother you.

We have a backplane case recently, we use the TI TUSB522P redriver.
Each paired with Intel APL and Kaby-Lake board, and found that the board with Intel Kaby-Lake will not be recognized by the device.
And with the Intel APL board, you can recognize the device.

In addition, the TX compliance test eye diagram of this case has a test pass
Verify the RX channel with the Intel iEMT tool and find that with the Intel APL board, High/Low will have a NO Value status.
With the Kaby-Lake board, you can't use iEMT to verify because you can't recognize the device.
At present, attempts have been made to adjust settings such as EQ/DE, but all have the same situation.
I don't know if you have this experience with Intel Kaby-Lake or APL. Is there any need to pay attention to it, or where the BIOS needs additional adjustment?


CCS/TMS320F28035: TMS320F28035 issue

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Part Number:TMS320F28035

Tool/software: Code Composer Studio

When the resistive load was loaded at the PFC level and converted from DCM to CCM mode at about 2.4kw, the current waveform was abnormal.

After loading, the current waveform is distorted, which is easy to cause shock on both sides.

At present, the input current tends to oscillate on both sides, and the current waveform is not a sine wave, as the "test wave" image.(Green for A phase current, blue A phase voltage, yellow for A phase on the tube drive)

The drive is unipolar modulating according to the control voltage, and the control voltage is basically opposite to the phase voltage when it is stable.

Please analyze whether there are control reasons.

TPS51285B: TPS51285B OCP cannot set over 15A

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Part Number:TPS51285B

Hi there,

Our customer encountered TPS51285 OCP can only be set to 15A, CS1 and CS2 resistance is 7.5K, And Rds(on)=2.7m omh.

The ocp range can only be 3A~15A.

increase the resistance value OCP can not increase up, but debugging is possible, please help provide a method reference ,Thank you!

Difference between FDC2114 and FDC2214

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Dear TI 

What's the difference between FDC2114 and FDC2214? Aside from the sample rate and resolution, what else are the differences between these two devices?

Thank you.

Best Regards

Janine Lin

TAS5631B: Overtempreture waring of TAS5631BPHDR/TAS5614APHDR/TAS5631DKDR

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Part Number:TAS5631B, TAS5614A

Hi,

I designed a TAS5631DKDR Board for Single-Ended Application and a TAS5631BPHDR Board for BTL Application, both designs‘ schematic diagram are the same as the recommend design in the Users' guide. But I met the same questions in all the designs, my /OTW /OTW1 /OTW2 /SD are always in low levels, indicates overtempreture warning or overload/ undervoltage warning, and the ready pins also always in low level. I replaced the TAS5631BPHDR to TAS5614APHDR(another IC with lower output power, which shares the same packages with TAS5631B), but the warnings are still existing.

All the VDD pins to Ground are 12 Volts,  and my output power stage supply is 48V(I also try to replace the supply into 30V, but the result is unchanged). 

My PCB layout design follow the PCB layout of the TAS5631B reference design, including the capacitors and resistors material and value, as well as the positions that they are placed in the PCB. I also designed a switch to control reset pin. By the way, I didn't give the input any PWM signals into my Board, it's in no input state.

I have tried place 8 ohm(rating in 12W) speaker load/ 500 ohm resistor as load connected to the output and also tried no load condition, but I am not sure whether my /OTW warnings are due to the wrong load selection.

Could you please give me some advices for debugging my board? I am really sad because I have never seen it works normally until now.

Regards,

Hu

CCS/IWR6843ISK: Compatibility of the demo code on AWR1642EVM and IWR6843ISK

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Part Number:IWR6843ISK

Tool/software: Code Composer Studio

Hi TI team,

Recently, we have built up our application based on SRR demo code with AWR1642EVM, and it also works on AWR1843EVM.

Now I will get the IWR6843ISK and I want to know my code of AWR1642 can be worked on IWR6843ISK directly or not.

If not, what's the difference between them and how can I make the demo code of AWR1642 or AWR1843 be worked on IWR6843ISK?

Please help us to figure out this problem.

Thank you.

Best regards,

Jacki Hsu

DS125BR820: VOD quesiton

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Part Number:DS125BR820

Hello

         what is different and relationship between VOD / VID Ratio and VOD_DB ? If we set VOD/VID ratio to 0.57 and VOD set -12dB, what signal we can see on output of 820 ? Thank you. 

BR

Patrick

WEBENCH® Tools/LMK04610: When will simulation tools be available?

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Part Number:LMK04610

Tool/software: WEBENCH® Design Tools

Dear TI,

I'm unable to model phase noise, jitter, or spurs for the LMK04610 with any of your simulation tools?  For example, Webench returns a message along the lines that "Simulation is not yet enabled for this part."  When will I be able to simulate the LMK04610?

I'm using the LMK04610 to create a 10MHz clock reference for your LMX2581 and a 200MHz sample clock with less than 100fs RMS jitter.  I need a better idea of what frequency should be used for the LMK04610's reference input and what frequency should be used for the VCXO.

Any interim suggestions?

Thank you,

Jeff


The video frames captured by VIN port are not the same

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Our processor is DRA74X, with 3.02.00.03 SDK version.

I'm using vin4b port to capture BT656(NTSC-M) 8-bit video signal from adv7182a subdevice. The video source keep providing the same pattern(color bar). I use below command to capture the video, 

yavta -c1 -fUYVY -Fvout_720x480_UYVY.yuv -s720x480 /dev/video1 

here are my questions,

1. The size of the video frame i captured is 691200, which mean the resolution is 1440 x 480, but the video source provide 720 x 480, and my captured command also specify the size is 720 x 480, why the system generate video frame with 691200 size?

2.Each time the valid data size is different(valid data mean it is the YUV data of color bar, otherwise, the data is 0x00). Sometimes the valid data size is 349920(which mean, 720 x 486), sometimes is 365760(which mean, 720 x 508), sometimes i even got a full size of valid data(which mean i got 691200 valid data, 720 x 960), why?

Regards,

Shawn

ISO1432: Inquire MP schedule

TIDM-02002: Auxiliary power in bidirectional AC/DC converter for Automotive market

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Part Number:TIDM-02002

I have a project would be use C2000 to implement the 10kW Bidirectional AC/DC converter for Automotive application, but I have one question what would be the auxiliary power in the bidirectional converter?  if I need to do the auxiliary power in the converter, there are 4 high voltage input flyback should be available in the converter, first is from AC/DC PFC left to right forward power, second is DCDC from left to right forward power, on the other hand form right to left reverse power also have two for DCDC and PFC both, right?   for the real application would the 12V be the auxiliary power?  does TI have any demo design for the reference?

CC3200

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Is the Ominvision OV798 Video Processor chip comptaible with the CC3200 Wifi MCU?

Thanks

SN74V3690: founding a FIFO normally same as SN74V3690 but it has 2 input clock signal.

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Part Number:SN74V3690

Hi,

i am new start in DSP field. Recently, i has a project that using a FIFO to store 2 sets 16 bits ADC value for FFT analysis. i have assigned a IC SN74V3690 as the data buffer, but after i check the datasheet that the SN74V3690 only have one input clock for data input, it is not enough if 2 sets ADC value input with 2 output clock signal to the FIFO at the same time. could you tell me that is there any other solution for this IC such asi i found some other brand that it can support 2 input clock signal for 2 set ADC value input or i must separate it to 2 FIFO for 2 sets ADC value, and do you have any suggestion if there is any IC can support it?

thanks 

regards

Jay Ho

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