Part Number:LAUNCHXL2-570LC43
Hi,
I need to use dvr8848 boost motor drive withthe Hercules LaunchPad, but the pins in not compatible, so I'm trying to make it compatible by changing the pin's function using software.
In boost layout, it needs adc pin at pin 5 and pwm pins at pins 9 and 10. But in Launch pad, these pins are AD2EVT and enhanched timer pins respectively.
Can I change these pin functions from their default to ADC and PWM. 
LAU
NCHXL2-570LC43
But i
Tool/software: WEBENCH® Design Tools
Hi,
I keep getting "Oops, Something went wrong" error message whenever I load the Webench Power Designer webpage! Any idea to solve this problem please!
Part Number:TMS570LS3137
Hi there,
I am building my network interface code around the HalCoGen generated emac driver and have found the TX interrupt may get stuck with txchptr.next_bd_to_process pointing to an empty entry and interrupt kept going non-stop.
This usually happens in the first transmit with larger packet size. From my experience if it get passed the first 10 it won't happen.
Has this problem been addressed with new HalCoGen code or?
Karl Tsai
Part Number:TMS570LC4357
Dear sir, i want to access QPOSLAT of both eQEP module on unit timer interrupt for velocity calculation of two motors. How to do it ?
Part Number:TM4C1294NCPDT
Tool/software: TI-RTOS
As instructed by Robert, I'm creating a new thread regarding my problem.
For reference, my previous thread was the following: https://e2e.ti.com/support/microcontrollers/other/f/908/p/793995/2938088#2938088
Basically, I followed the instructions to recompile ti-rtos since i needed to change a line in "ffconf.h" on FatFS module.
When running "make -f tirtos.mak drivers" I got the following error:
building tirtos drivers... gmake[1]: Entering directory `c:/ti/tirtos_tivac_2_16_00_08/products/tidrivers_tivac_2_16_00_08' building drivers packages ... making all: Thu Apr 18 13:28:25 2019 ... ======== .interfaces [./packages/ti/boards] ======== ======== .interfaces [./packages/ti/drivers] ======== ======== .interfaces [./packages/ti/mw] ======== ======== .interfaces [./packages/ti/mw/fatfs] ======== ======== .interfaces [./packages/ti/mw/wifi/cc3x00] ======== ======== .interfaces [./packages/ti/drivers/ports] ======== making package.mak (because of package.bld) ... making package.mak (because of package.bld) ... making package.mak (because of package.bld) ... making package.mak (because of package.bld) ... js: "C:/ti/tirtos_tivac_2_16_00_08/products/bios_6_45_01_29/packages/ti/targets/arm/elf/IArm.xs", line 77: Error: The compiler in c:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.5 is not compatible with this version of TI-RTOS or SYS/BIOS. Please use Arm compiler 5.2.2 or newer. js: "C:/ti/tirtos_tivac_2_16_00_08/products/bios_6_45_01_29/packages/ti/targets/arm/elf/IArm.xs", line 77: Error: The compiler ijs: "C:/ti/tirtos_tivac_2_16_00_08/products/bios_6_45_01_29/packages/ti/targets/arm/elf/IArm.xs", line 77: Error: The compiler in c:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.5 is not compatible with this version of TI-RTOS or SYS/BIOS. Please use Arm compiler 5.2.2 or newer. n c:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.5 is not compatible with this version of TI-RTOS or SYS/BIOS. Please use Arm compiler 5.2.2 or newer. gmake[1]: *** Deleting file `package.mak' gmake[1]: *** No rule to make target `package.mak', needed by `.interfaces'gmake[1]: . Stop. *** Deleting file `package.mak' gmake[1]: gmake[1]: *** *** Deleting file `package.mak'No rule to make target `package.mak', needed by `.interfaces' . Stop. gmake[1]: *** No rule to make target `package.mak', needed by `.interfaces'. Stop. xdctools_3_32_00_06_core\gmake.exe: *** [packages/ti/drivers/ports,.interfaces] Error 2 xdctools_3_32_00_06_core\gmake.exe: *** Waiting for unfinished jobs.... xdctools_3_32_00_06_core\gmake.exe: *** [packages/ti/drivers,.interfaces] Error 2 xdctools_3_32_00_06_core\gmake.exe: *** [packages/ti/mw/fatfs,.interfaces] Error 2 js: "C:/ti/tirtos_tivac_2_16_00_08/products/bios_6_45_01_29/packages/ti/targets/arm/elf/IArm.xs", line 77: Error: The compiler in c:/ti/ccsv6/tools/compiler/ti-cgt-arm_5.2.5 is not compatible with this version of TI-RTOS or SYS/BIOS. Please use Arm compiler 5.2.2 or newer. gmake[1]: *** Deleting file `package.mak' gmake[1]: *** No rule to make target `package.mak', needed by `.interfaces'. Stop. xdctools_3_32_00_06_core\gmake.exe: *** [packages/ti/mw/wifi/cc3x00,.interfaces] Error 2 gmake[1]: *** [all] Error 2 gmake[1]: Leaving directory `c:/ti/tirtos_tivac_2_16_00_08/products/tidrivers_tivac_2_16_00_08' make: *** [drivers] Error 2
How should I procede?
Part Number:MSP432P401R
Tool/software: Code Composer Studio
my project includes UART, DMA and SPI parts. First, I initialized UART, DMA then SPI. After SPI I checked UART and I saw that something goes wrong. I recognized this error. I closed DMA and SPI and the error continues. I tried one of my code's backups but still the same error. I reinstall CCS but no change. My code can be debugged and run. However it does not work properly. I change my MSP432 board but the same error occured. I couldn't find proper answer for that error in e2e forums. I couldn't understand what causes this problem. Is there anyone can tell me what is the reason of this problem?
Part Number:TPS65131
Hi Team,
I received the following request:
#########################################
We have a problem with buck-boost dual converter TPS65131RGER. Our product has just started production but we could not solved it, it is very urgent.
The symptoms are below:
When the input voltage (marked as Battery_Out in the schematic) goes above 4.05V, both output stages of VR4 (TPS65131RGER) become unstable, i.e the 8V stage falls to about 3.8V and -5V stage even worse. The supply outputs are quite stable when “Battery_Out” ranges between 3V to 4.05V.
We checked the datasheet again but could not find any component value or related specification that seems wrong to cause such a behavior.
#########################################
I will send the schematic separately.
Regards,
Fabio
Part Number:CC2640R2F
Dears:
Customer finds CC2640R2F can not be download program.
And CQE said CC2640R2F has been locked through FA.
There are 3 queries as follows :
1. Why is CC2640R2F locked?
2. How to unlock these CC2640R2F?
3. There is any influence about the unlocked CC3640R2F?
pls. kindly help to give some advice.
Part Number:LAUNCHXL2-RM57L
I have LwiP 1.4.1 running on an RM57L with FreeRTOS. I can see that the lwip calls to write data out are working and the yellow light consistently flashes on the board when my program is running. I came across this post with someone dealing with a similar issue:
https://e2e.ti.com/support/microcontrollers/hercules/f/312/t/547007?LwIP-RM57-configuration-problem
The solution they are given is to "change to NORMAL_OIWTNOWA_NONSHARED (Write-through cache scheme)" but the page to change MPU options from my Halcogen file is frozen. How can I make this change? 
Part Number:MSP432E401Y
Tool/software: TI C/C++ Compiler
Hi,
I hope you can help me with this: I have a 4G modem connected via UART to a MSP432E401Y microcontroller.
My goal: To receive a new flash image via the modem and update my main app(No RTOS).
Constraint: I know there's a bootloader example in the SDK: dev.ti.com/.../node
The problem is that I already use this bootloader to update my main app over Ethernet.
Given this, what I have in mind is to have 2 apps in flash: one my main app, and a second app which updates the first one.
The CPU runs the main app, when it receives from the modem a command to indicate that we should update the application image, it jumps to the second app.
This 2nd app receives the flash image and starts writing to the flash section where the main app is located.
This is what I have(both apps don't use RTOS):
First app:
Second app:
Just in case I also attach the linker command files of both apps:
First app's .cmd file:
Second app's .cmd file:
I can see that the main app jumps to the second one, but it stops working after a few milliseconds. Could you help me with this?
Will this plan work or I'm missing something?
Thanks!
Richard
Part Number:AM4378
Tool/software: Linux
Hello,
I have a custom board based on the AM437x EVM, and I am using TI-SDK version 4.3.0.5. I am trying to get WiFi up and running on my board, and I am using the WL1831 WiFi/BT combo module. The WiFi pins are hooked up to MMC2 on the AM4378.
Initially in my dts file I had an mmc2 node because I am using MMC2 but it wasn't working, and I noticed the EVM also uses MMC2 to hook up the WiFi chip, but it has the node labeled mmc3 in the dts file. I also remembered for mmc0 I had to label it mmc1 in the dts file.
So I changed the node to be labeled mmc3 in my dts file, but now the boot hangs during U-Boot when it tries doing something with MMC. Here is the boot log:
U-Boot SPL 2018.01-00558-g8617e02-dirty (Apr 19 2019 - 09:32:41)
Trying to boot from MMC1
SPL: Please implement spl_start_uboot() for your board
SPL: Direct Linux boot not active!
U-Boot 2018.01-00558-g8617e02-dirty (Apr 19 2019 - 09:32:41 -0500)
CPU : AM437X-GP rev 1.2
Model: TI AM437x UTI BOARD
DRAM: 512 MiB
PMIC: NONE
NAND: 0 MiB
MMC:
I looked at the code in CCS and saw that it fails in the function omap_hsmmc_init_setup(), at the line writel(readl(&mmc_base->sysconfig) | MMC_SOFTRESET, &mmc_base->sysconfig);
Any ideas on what could be going wrong? Here are the relevant sections of my device tree:
wlan_en_reg: fixedregulator@2 {
compatible = "regulator-fixed";
regulator-name = "wlan-en-regulator";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
startup-delay-us = <70000>;
/* WLAN_EN GPIO for this board - Bank0, pin31 */
gpio = <&gpio0 31 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
mmc3_pins_default: mmc3_pins_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x88c, PIN_INPUT_PULLUP | MUX_MODE3) /* (A12) gpmc_clk.mmc2_clk */
AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE3) /* (B12) gpmc_csn3.mmc2_cmd */
AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE3) /* (C5) gpmc_a1.mmc2_dat0 */
AM4372_IOPAD(0x848, PIN_INPUT_PULLUP | MUX_MODE3) /* (C6) gpmc_a2.mmc2_dat1 */
AM4372_IOPAD(0x84c, PIN_INPUT_PULLUP | MUX_MODE3) /* (A4) gpmc_a3.mmc2_dat2 */
AM4372_IOPAD(0x878, PIN_INPUT_PULLUP | MUX_MODE3) /* (A3) gpmc_be1n.mmc2_dat3 */
>;
};
/* Optional sleep pin settings. Must manually enter values in the below skeleton. */
mmc3_pins_sleep: mmc3_pins_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0x88c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (A12) gpmc_clk.mmc2_clk */
AM4372_IOPAD(0x888, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (B12) gpmc_csn3.mmc2_cmd */
AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (C5) gpmc_a1.mmc2_dat0 */
AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (C6) gpmc_a2.mmc2_dat1 */
AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (A4) gpmc_a3.mmc2_dat2 */
AM4372_IOPAD(0x878, PIN_INPUT_PULLDOWN | MUX_MODE7) /* (A3) gpmc_be1n.mmc2_dat3 */
>;
};
wlan_pins_default: wlan_pins_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | WAKEUP_ENABLE | MUX_MODE7) /* (F6) gpmc_a7.gpio1[23] WLAN_IRQ*/
AM4372_IOPAD(0x870, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (A2) gpmc_wait0.gpio0[30] BT_ENABLE */
AM4372_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (B3) gpmc_wpn.gpio0[31] WLAN_ENABLE */
>;
};
wlan_pins_sleep: wlan_pins_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | WAKEUP_ENABLE | MUX_MODE7) /* (F6) gpmc_a7.gpio1[23] WLAN_IRQ*/
AM4372_IOPAD(0x870, PIN_OUTPUT_PULLUP | MUX_MODE7) /* (A2) gpmc_wait0.gpio0[30] BT_ENABLE */
AM4372_IOPAD(0x874, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* (B3) gpmc_wpn.gpio0[31] WLAN_ENABLE */
>;
};
/* WiFi/Bluetooth Module */
&mmc3 {
status = "disabled";
/* these are on the crossbar and are outlined in the
xbar-event-map element */
dmas = <&edma 30 0 2>,
<&edma 31 0 3>;
dma-names = "tx", "rx";
vmmc-supply = <&wlan_en_reg>;
bus-width = <4>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&mmc3_pins_default>;
pinctrl-1 = <&mmc3_pins_sleep>;
ti,non-removable;
cap-power-off-card;
keep-power-in-suspend;
#address-cells = <1>;
#size-cells = <0>;
wlcore: wlcore@0 {
compatible = "ti,wl1835";
reg = <2>;
interrupt-parent = <&gpio1>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
};
};
Part Number:TPS65131-Q1
Hello,
We are having some issues with the TPS65131.
In our board design, we generate 5V and 3V3 power supplies from 28V input using the LM5140QRWGRQ1.
Then from the 5V, we generate a 10V and -10V voltage using the TPS65131.
We have sequenced the startup of those power supplies using the UCD9090-Q1.
Once the 5V is started, 10ms after we start the 10V and 15ms after the -10V.
As you can see from the below oscilloscope print, when the 10V starts, there is an immediate decrease of the 10V, stopping the 10V raise (hence the step) and then an overshoot occurs once the 10V reaches its regulation state. For the -10V, the behavior is a little different but we still have an overshoot as you can see.
The schematic of our 3V3/5V design:
The schematic of our 10V/-10V design:
Any help would be appreciated.
If we can't fix that we might have to take a component from a competitor...
Clément
Part Number:TMS320F280049
Hi Team,
Could you kindly help clarify below questions for internal DAC in F280049?
1) What's the basic step setup time in DAC(1LSB);
2) How long time would be cost from 0 to 4095?
Expect for your reply, thanks.
Best Regards
Benjamin
Part Number:LAUNCHXL-CC1352P
Hi Team,
I need an info on the how much the stack of 6LoWPAN needs in term of memory size.
Regards,
Fabio
Part Number:IWR1642
Hi Team,
I received the following request, can you help, please?
######################################################################
We have decided to use IWR1642 (FMCW modulated radar) in retail sector ( person counting with door in-out and child seperation feature if possible). Could you give us any succesfull example with estimated accuracy rate (>%95). Our customer needs high accurate and child - adult separation. We have evaluated Tof and Stereovision solutions. But accuracy rate is not enough.
######################################################################
Best regards,
Fabio
Part Number:DLP4500
Hi everyone,
I am using a coherent source (633nm) to illuminate the DMD array. If I use the pattern generation in the GUI with a standard image (a lattice of one pixels for example) the diffraction pattern off of the DMD matches a model that I created. However, if I pipe the same pattern over HDMI using opencv to display the pattern in fullscreen on the "second monitor" DMD I don't get the same diffraction pattern. This makes me think that over HDMI I am not getting a pixel perfect match with the image I am sending in.
I was wondering if anyone could recommend a way of getting pixel perfect control of the DMD mirrors over HDMI. I will have numpy arrays that I want to "display" on the DMD and I have to have precise spatial control of them.
Thank you for your time.
Part Number:INA330
Hello, I am using the INA330 for set-point temperature control application. I wanted to confirm a few aspects of my understanding of the datasheet.
Does the ±12.5uA maximum guaranteed current correspond to pin 7 (Io) or pin 8 (Vo)? This wasn't clear to me from the Current Conveyor - Current Output Range listed in the table on page 3 relative to the this statement on page 7: "The INA330 output (pin 8) is capable of swinging to within 10mV of the power-supply rails. It is able to achieve rail-to-rail output performance while sinking or sourcing 12.5μA." Similarly, is the Vo output current limit ±25mA (short circuit current)?
If the 12.5uA current limit does apply to the Io pin 7, I wanted to confirm that this inherently limits the Vo voltage swing based on the Rg value selected. The Vo swing would only guaranteed to be Rg*±12.5uA before Io becomes current-limited and the voltage won't scale linearly. So a 200k Rg gives a Vo=Vadj±2.5V, while a 5k Rg would give a Vo=Vadj±62.5mV. That voltage range could possibly be limited/saturated if the voltage swing extends too close to GND or V+ based on the Vadj set-point voltage. Is that all correct?
Thanks for your help.
Good day
i am currently working on an Acer V7850 projector which is currently running C04 firmware and i was in the process of performing a firmware update to resolve HDR dark signal issue using DLP composer lite on Windows 7 PC and every time i load the '' .bin '' firmware file the projector powers ON without display,to get the projector to display again i have to reload the full '' .img '' file which gets me back up and running with the C04 firmware.My current problem now when using DLP composer lite is iam now getting a USB error message which says '' Error:cannot open USB driver-NO projectors available and '' unable to enter device programming mode ''.Would you have any idea what i need to to and where iam going wrong in trying to fix what seems to be a can of worms that i have just opened.Your response will be helpful thanks