Part Number:CC3220
Hi,
Since we are already running low on available RAM space, I tried to rearrange some sections in the linker file. However, I quickly found out that even though my newly compiled applications worked when uploading through JTAG, they did not work when booting from flash (through the ROM bootloader).
I don't fully understand why though. Is there more info regarding what is required for linker sections?
For example, my current linker file looks like this (and works for JTAG+Flash):
I managed to move the data section to SRAM, but I do not seem to be able to move .cinit or the block surrounding it without causing a freeze at boot from flash! (JTAG works)
The memory visualization tool shows the following for my current linker file:
As you can see, I'd like to also move .cinit to the first part of SRAM0, but that fails.
Am I missing something, or does the bootloader expect sections to be at specific places? (aside from the ISR vectors at 0x20004000)
Thanks for your reply!