I wish to verify the smart reflex circuit by controlling the Vcntl3:0 signals with boundary scan EXTEST instruction then monitoring the smart reflex voltage.
Drive out vcntrl: 0000 Look for lowest smart reflex Voltage.
Drive out vcntrl: 1111 Look for highest smart reflex Voltage.
I see the compliance pattern requires PORz and RESETFULLz to be high.
Is there any reason this will not work?
Any other considerations or prerequisites?