Part Number:TMS320F28377S
Tool/software: TI C/C++ Compiler
Hi
one of my customer uses the CCSv6.1 to develop their software platform with TMS320F28377S, and the compiler version is TI v6.4.2.
right now they meet one problem that it get the wrong result for assignment statement.
pls look into below image which shows the problem.
the same assignment is executed twice in sequence, but can get different result.
the assembly statement shows that the CPU accesses the AR7 register to get itest variable's address for the first statement,
while accesses to AL for the second statement, and the second statement can get the right result.
this itest variable is defined with volatile, and the optimize for speed is set to 2, optimize level is set to 0.
but customer's previous version software does not have this problem, and the issue happens just after the code size is above some level(more variables and more functions).
pls help provide your suggestion to identify what is this root cause, why CPU access to AR7 for only this statement, and AL for others.
I upgrade the compiler version to TI v6.4.12, but it could not work.
I check the RAM size allocation, and there is no problem.
It is a bit urgent, appreciate for your timely feedback to position this issue
