Part Number:AM3352
Hi all,
I have a problem regarding tDQSS (CK to DQS skew) with a DDR3L RAM.
The TI test tool outputs the following values for DATA_PHY_WR_DQS_SLAVE_RATIO:
The Slave Ratio Search Program Values are...
*************************************************************************************
PARAMETER MAX | MIN | OPTIMUM | RANGE
*************************************************************************************
DATA_PHY_RD_DQS_SLAVE_RATIO 0x071 | 0x005 | 0x03b | 0x06c
DATA_PHY_FIFO_WE_SLAVE_RATIO 0x133 | 0x000 | 0x099 | 0x133
DATA_PHY_WR_DQS_SLAVE_RATIO 0x079 | 0x012 | 0x045 | 0x067
DATA_PHY_WR_DATA_SLAVE_RATIO 0x0b5 | 0x048 | 0x07e | 0x06d
*************************************************************************************
===== END OF TEST =====
The signal integrity measurements show the following behaviour:
DATA_PHY_WR_DQS_SLAVE_RATIO = 0x06 => tDQSS = 430 mtCK
DATA_PHY_WR_DQS_SLAVE_RATIO = 0x045 => tDQSS = 300 mtCK
DATA_PHY_WR_DQS_SLAVE_RATIO = 0x03b => tDQSS = 280 mtCK
DATA_PHY_WR_DQS_SLAVE_RATIO = 0x02a => tDQSS = 200 mtCK
DATA_PHY_WR_DQS_SLAVE_RATIO = 0x020 => uboot fails
The maximum tDQSS sould be +/-250 mtCK for DDR3L
Only with 0X02b the signal meets the specification. But with 0x020 uboot fails.
With the recommended value of 0x045 the signal is out of the specification.
It seems that a tDQSS of 0 mtCK is impossible.
The RAM used is Micron MT41K256M16TW-107 IT:P
Any idea what the problem could be?
best regards
René