Part Number:TPS65983B
Hi,
I asked a time ago some question about daisy chaining the TPS6598x
https://e2e.ti.com/support/interface/usb/f/1008/t/589807
I made a PCB and I did not work so I started debugging. I noticed a lot of things that are not correct/missing in the datasheet and the configtool 3.08 has bugs.
Datasheet:
9.4.8.1 Primary TPS65983B Flash Master and Secondary Port
"The primary TPS65983B must have its I2C_ADDR pin tied to GND with a 0 Ω to denote it as the primary TPS65983B."
1. This line is not true.
2. Add: SPI_MISO Low has to be low when in secondary mode. Otherwise system will not boot. (now it is only in the flow chart)
9.5.2.3 I2C Address Setting
1. Bit 5 and 4 (Debug_CTL1/2 )only work for i2c2 port address and does not have any effect on i2c1 port address.
2. i2c1 address is only effected by the resistor value. => 9.5.2.5 I 2C Pin Address Setting
3. i2c2 address is a combination of Debug_CTL1/2 and Resistor Value
9.5.2.5 I 2C Pin Address Setting
1. The resistor value's in the Config tool does not match with table 10 of he datasheet
2. Slave mode? look at my first point of 9.4.8.1
9.4.8 UART Download
1. When the Debug_CTL1/2 and I2C_ADDR does not match with Debug_CTL1/2 and I2C_ADDR that is set in the firmware, the firmware will not load. So they need to be identical. Debug_CTL1/2 DOES count in this
situation. If you are only using i2c1 you need to config Debug_CTL1/2 to load the firmware. But still it does not effect the address of i2c1
2. add: You have to turn UART port in the firmware of the master enable otherwise it will not boot.
Config tool:
1. DBG_CTL1 and DBG_CTL2 are swapt with the hardware. So in the config tool DBG_CTL1 = DBG_CTL2 and DBG_CTL2 = DBG_CTL1
2. config tool manual is for 3.07 instead of 3.08
3. What is wit the "Ports" column. The column says Port1 but the tabs say port0. What kind of address is it?
Kind regards,
Pieter