Part Number:AM5728
Hello, TI Experts,
Our customer sent us additional questions about USB2.0 Host Complience test of AM5728 from E2E thread as below.
http://e2e.ti.com/support/arm/sitara_arm/f/791/p/632915/2335993#2335993
They can found the recommended way of USB2.0 Host Complience test by Linux from this thread.
Thank you.
But now they design their product with 3rd-party OS (not TI SDK-Linux).
So they want to know how to enter the USB2.0 test mode by AM5728 register setting.
They think DCTL is key register of test mode from wiki below.
http://processors.wiki.ti.com/index.php/Linux_Core_DWC3_User%27s_Guide#USB_2.0_Test_Modes
Question:
Could you tell us details of DCTL register?
- the physical address of DCTL
- bit description including test mode
- detail explanation about "test_j, test_k, test_se0_nak, test_packet, test_force_enable"
They understand the difficulty of getting advice from TI with no TI-SDK.
(So they use TI-SDK as a reference for their understanding.)
We would appreciate if you tell us the recommended way for USB2.0 Host Complience test with 3rd-party OS.
Best regards,