Part Number:TMS320F28379D
Dear team,
could you please help with the following questions:
Our plan is to use core 1 of the 28379D for closed loop control that involves data exchange to the C6000 DSP via uPP in every cycle.
Core 2 is planned to run the state machine and to handle various real-time communication links.
The 28379D has two EMIFs. One (EMIF2 used by core 1) will be used to interface an external ADC and the other (EMIF1, used by core 2) is planned to handle two industrial communication modules (EtherCAT and Ethernet Power Link, both with dual ported RAM as interface, SPI is also possible).
Furthermore, we need external RAM since we really struggle with memory size.
Now, the questions are:
- Do you have experience with different types of RAM on one EMIF (communication modules with dual ported RAM and SRAM)? Is this possible at all? If yes, what limitations do we need to be aware of?
Do you have recommendations for a different architecture? e.g.:
- Only RAM on EMIF1, communication modules via SPI / McBSP
- RAM + one communication on EMIF1, second communication module via SPI / McBSP
- Is it possible to access SRAM connected to EMIF 1 from both cores (e.g. core 1: write, core 2: read)? If no, is there a reference solution to share data between the two cores through external memory (e.g. through dual ported RAM)? The application is fast data logging (write data with several kHz to RAM). Once the recording is stopped, core 2 sends the entire data log through the communication links).
Another application is the replay of waveforms, that are received by core 2 through communication links and then core 1 uses the waveform data points as set points for the control loop. The more RAM, the longer the data logs / stored waveforms can be.
Could you please help to answer the questions above?
Thanks,
Peter