Part Number:LAUNCHXL-F28379D
Hi,
In my application for each PWM period (4 Khz) the slave acquires 4 voltage (4 channel ADC) and send them to the master through 4 comunication SPI (NO FIFO, 4 wires, HS disable).
The master read the 4 voltages and calculates 2 duty cycle, then send them to the slave through 2 communication SPI.
The master is in CCS debug.
Now the problem is: if slave run by flash memory it work fine, if slave run by CCS debug for the first few seconds communication works well then after a few seconds it is no longer synchronous, if voltage communication is correct then dutycycle communication isn't correct and vice versa.
Can anybody help me understand the reason?
p.s: Master and Slave are LAUNCHXL-F28379D