Datasheet SBAS561A page 51 says "Before device power-up, all digital and analog inputs must be low. At power-up, these signals should remain low until the power supplies have stabilized". We can't fulfill this (and maybe no one can) but I suspect that what you are talking about is risk for latch-up, and if so, I hope you can give further details on the requirement.
Regarding digital input signals, we have 10kohm pull-ups on Chip select, clock select, power down, data ready and start pin, and I can't see how we can avoid that.
Regarding analog input signals, we have differential signals, 5 variants:
a) - input is 0V (within 10mV), + input is up to +/-60mV, 1kohm series resistor (on each pin). Note: + input can be up to +/-12V for a short while, before start-up of ADC.
b) 304mv differential (+152mV on + input, -152mV on - input) via 3,1kohms (on each pin)
c) - input is 0V, + input is +94mV via 1,9kohms (in total)
d) - input is 0V, + input is +170mV via 1kohms (in total)
e) - input is 0v, + input is +175mV via 7kohms (in total)
Is this acceptable? Otherwise we have a problem.