Hi,
I found some field calculation by AM335x DDR2 Timing Configuration Tool is not consistent with the AM335X EMIF4D registers description.
For example, reg_t_rp in the SDRAM_TIM_1 Register, "Minimum number of m_clk cycles from Precharge to Activate or Refresh, minus one", but the AM335x DDR2 Timing Configuration Tool calcualtion uses tCK to calculate this value. From the user mannual m_clk=1/2tCK. Does anyone know about this descripancy?
Thanks,