ISR Functionality on the MSP430

I am currently using the MSP430 as an SPI slave, specifically, to act as if it was an EEPROM device.  I thought I finished developing the system a few weeks back, but some issues have come up which have lead me to realize that there is still more to be done.  

What I found was that the program sends bad data in between the state that the master writes to the FRAM, and when the master asks for the status.  This is an example of what I have:

int main(void)
{
   SYSTEM_init();
   Status_Reg = 0xF0;
   while (1)
   {

      while (!(UCA0IFG & UCRXIFG));

      //=================================================================
      //=================================================================
      //=================================================================
      if (RXData == 0x03)
      {
         Status_Reg |= 0x01;

         if (SPIaddress == 0x20) find_magic_number();
         else if (SPIaddress == 0x24) find_magic_number();
         else if (SPIaddress == 0xA1) find_magic_number();
         else if (SPIaddress == 0xA9) find_magic_number();
         else if (SPIaddress == 0xE3) find_magic_number();
         else if (SPIaddress == 0xF4) find_magic_number();
         else if (SPIaddress == 0xF5) find_magic_number();

         Status_Reg &= (~(0x01));
         RXData = 0x00;
      }
   }
}

#pragma vector=USCI_A0_VECTOR
__interrupt void USCI_A0_ISR(void)
{
   Temp_SPI_Read = UCA0RXBUF;

   if (Temp_SPI_Read == 0x01)
   {

      UCA0TXBUF = Status_Reg;

      while ((UCA0STATW & UCBUSY) == 0);
      while ((UCA0STATW & UCBUSY) == 1);

      Temp_SPI_Read = UCA0RXBUF;
      UCA0TXBUF = 0x00;
   }

   //=================================================================
   //=================================================================
   //=================================================================
   else if (Temp_SPI_Read == 0x03)
   {
      UCA0TXBUF = 0x00;
      while ((UCA0STATW & UCBUSY) == 0);
      while ((UCA0STATW & UCBUSY) == 1);
      SPIaddress = UCA0RXBUF;
      FRAM_ptr = (unsigned short *)(FRAM_START+SPIaddress);

      while ((UCA0STATW & UCBUSY) == 0);
      while ((UCA0STATW & UCBUSY) == 1);
      *FRAM_ptr = UCA0RXBUF;
      UCA0TXBUF = Status_Reg;

      RXData = Temp_SPI_Read; // Do the rest of the logic outside of the ISR

   }

   UCA0IFG &= ~UCRXIFG;
   __bic_SR_register_on_exit(CPUOFF);// Wake up to setup next TX
}

I am not sure if this is caused by latency, since I'm aware that it will take up to 6 clock cycles to get into the ISR, and 5 clock cycles to get out of the ISR.  I also know the following:

• The SPI Master has set the clock cycle to 250kHz, therefore, a whole 8-bit transmission should take 32us.
• After each transmission, the SPI waits about 3us until starting the next transmission.
• The MSP430 clock is set to it's maximum frequency at 24MHz.  Therefore, each clock pulse takes 0.04167us (41.67ns)

If this information is correct, then I should be able to send back the correct status without any problems.  Please let me know if I'm missing a piece of information in this description, or if I'm overlooking something.