Part Number:TAS5731M
Hi,
I’m Antonio. I contact you because I am developing a new device with TAS5731M. I have some doubts that I would like to consult you because despite the arrival of I2S signals at TAs5731M, I can not seem to hear anything from the signals.
I have the next signals in TAS5731M:
Pin 19 (PDN) and 25 (RESET) --> HIGH (3.3V)
I2S
Pin 20 (LRCLK) --> Signal of 44.1 KHz
Pin 21 (SCLK) --> Signal of 2.82 MHz
Pin 22 (SDIN) --> Auidio signal
Pin 15 (MCLK) --> Signal of 12 MHz
Question 1:
Can the MCLK frequency be any of the limits that the datasheet marks or depends on the LRCLK signals?
The 0x00 register has value in my device 0x6C. MCLK frecuency = 256* fs = 256*44.1KHz = 12.29MHZ
Can MCLK signal be 12MHz instead of 12.29MHz for our case?
Question 2:
I set up the following registers
0x05 --> Value 0x00 (Normal operation. Exit all-channel shutdown)
0x07, 0x08, 0x09, 0x0A --> Value 0x00 (24dB).
The 0x02 has 0x00 value (No errors) and 0x04 register 0x05 value (I2S 24 bits).
The remaining registers are left with the default values since we do not want to perform any signal processing.
Would there be any other record that I should fit for the TAS5731M to work correctly?
Question 3:
What is the bank switch register (0x05) ? What is it for? I
I do not know if it is mandatory to change the default value according to the frequency fs (in my case 44.1 Khz) or it is just a record for signal processing.
I await your response to continue development.
Thank you very much in advance.
Antonio Guzman