Hi everyone!
I'm having issues with one of TI's RS-485 bus transceivers.
It's the ISO3088 which I use to provide an interface between a 5V RS-485 bus and a 3.3V Xilinx FPGA.
I noticed that on the logic side the voltage level (on pin "R") for a "0" (LOW level) is somewhere around 2.8V instead of GND.
The HIGH level is at 3.3V as expected and the shape of the signal looks just fine for a UART transfer.
Also the 2.8V are really stable and are reached with appropriate over- and undershoots just as if 2.8V would be the level that the driver is aiming for.
I don't think a digital FPGA input is considered a serious load on the "R" pin and there are no pull-x resistors.
The RS-485 bus side is rock solid and works great with different transceivers/ bus drivers. Cable length is really short too and bus lines are terminated.
The Logic Side voltage supply and ground are provided from the FPGA board and the 3.3Vs are verified to be absolutely stable. I also tested connection to GND of the FPGA board on all three GND pins.
The 5V bus side voltage supply and ground are provided from a different power supply. => Proper isolation between Logic Side and Bus Side
There are a bunch of these ICs on a custom PCB, so I can rule out a single unit defect as they all show this behaviour.
Of course ~2.8V can not be detected as LOW reliably so this is a huge problem and really puzzling.
Measurements were done with different oscilloscopes and sending data seems fine. I checked the "D" pin while sending and I can see the FPGA driving it to GND for the low level as expected. So I'm willing to trust the graphs from the scopes.
Thanks for any help or ideas on this.
If you need more information or want me to provide scope waveforms just drop a note.
Best Regards
Luis