TMS320F28069: The use of 0x6822 = 0x00FF to achieve lDD in Low Power Mode?

Part Number:TMS320F28069

Hi, based on the datasheet of F28069, it is stated that:

"To realize the IDD number shown for HALT mode, the following must be done:

• PLL2 must be shut down by clearing bit 2 of the PLLCTL register.
• A value of 0x00FF must be written to address 0x6822."

What is the use of the second one? In my case, it helps to further reduce the current even in Standby mode. But what does it exactly do to the chip?

I am thinking to combine this in Standby mode instead of Halt mode. Do I need to write anything to this address after the device waking up from the watchdog interrupt?

Thanks a lot!