TMS320C6678: Division by Zero and Floating Point Excpetion

Part Number:TMS320C6678

Hello
My is asking if we can provide confirmation regarding Floating Point Exception and Division by Zero handling :-

Please let me list the following pre-conditions:

1. We need to catch Floating Point (FP) exceptions (including Division by Zero, overflow, underflow, illegal operations etc.)

2. Basically our platform SW does not include any particular risky FP operation but, external linked libraries do it.

With point 2 I mean that we cannot know in advance where a division is done because part of linked libraries is auto-generated.  

In few words we need to intercept this kind of anomalies at runtime.

We have created some topics on the forum and the conclusions are:

1. We did some basic benchmarks causing exceptions on purpose and expecting a trigger in FP control registers but nothing happened. (Ref. is sprugh7.pdf)

2. According to TI experts Dividing by 0 invokes undefined behaviour (forum can be checked here)

3. In our understanding there is no way to get an HW interrupt when a FP-excep occurs. At this topic by Giovambattista we got a reply confirming that. On the other hand it has been confirmed that registers should be updated after a math operation

At this LINK you can find also a further question raised by Giovambattista about FP registers.

Could you please verify the previous bullets (2 and 3)? Maybe we are doing something wrong.

Thank you in advance for your support.

Best Regards

Bob Bacon