C6678 cache problem

hi：

I am using cache, and I have some questions：

 L1D 32K cache, L2 32K cache

I want to know how the Coherence betwen L1D and L2 cache,

1 when use CACHE_wbInvAllL2， will it effect the L1D cache?

2 if use CACHE_wbInvAllL1d, will it update the L2 cache? what will the L2 cache do?

I have saw the cache and corepac document, but still not clear.  anyone can help me ? Thanks.

Best regards

Si