DM8168 platform OCP CLK is 400MHz. Cortex A8 CPU CLK is 1GHz ;sysbios 6.33
How many cycles will it take to read or write one 32bit word from L3 or L4 space (uncache unbuffer)?
I donot know the efficiency of the interconnect bus.
DM8168 platform OCP CLK is 400MHz. Cortex A8 CPU CLK is 1GHz ;sysbios 6.33
How many cycles will it take to read or write one 32bit word from L3 or L4 space (uncache unbuffer)?
I donot know the efficiency of the interconnect bus.