Hello,
The sciLowLevelInterrupt() routine supplied with HALCoGen 3.04.00 has a case statement that switches on SCI Interrupt Vector Offset 1 (SCIINTVECT1). The default case is commented as a phantom interrupt. We are frequently getting this phantom interrupt with an offset of 0 which is reserved. The SCI Flags Register (SCIFLR) is showing the RXRDY bit is set, but the ISR does not process it due to the higher priority phantom interrupt.
1) What causes an SCI phantom interrupt?
2) We periodically disable SCI_RX_INT to directly access the queue. If this is done at the same time a byte is coming in, could this cause the offset register to be cleared?
Thanks, Charlie Johnston