ADC12J4000: LSB of Digital Output

Part Number:ADC12J4000

Hello,

We are using ADC12J4000 in my own design with the configuration of "Bypass Mode, No Decimation, DDR = 1, P54 = 0". The test is successful in Test-Pattern Mode with the same data pattern as Table 33 in the datasheet. But the LSB (bit0) of each sample(12 bits) is always zero in the Normal operation(TIME_STAMP_EN, bit5 of register 0x050 is disabled), no matter we are measuring sine wave signal or just noise. The registers for Normal operation are the same to the configuration in Test-Pattern Mode except ADC_PAT_EN(bit 2 of register 0x058). Do any registers will affect the ADC encoding process?