I'm working on my board which has 6678(RC) and v6 FPGA(EP) connected with pcie.
We are working on this kind of unnormal type that Dsp will send some memory write packets to FPGA via pcie to start a DMA write from FPGA to DSP. This is success.
1. first i have a question about the inbound and bar confirgure.
in the DSP(RC)
my bar1 base address is 0x90000000;
outbound low address is 0x90000000;(32bit type)
inbound low address is 0x10000000;
inbound offset 0x0;
as in the fpga side ,we cannot configure something like outbound address,
we made the address on line start from 0x90000000;
so,I can transfer the data from ep to my ddr3 in dsp side directly(0x90000000-0x10000000+offset);
I don't quite understand the original example
ibCfg.ibBar = PCIE_BAR_IDX_M; /* Match BAR that was configured above*/
ibCfg.ibStartAddrLo = PCIE_IB_LO_ADDR_M;(0x90000000)
ibCfg.ibStartAddrHi = PCIE_IB_HI_ADDR_M;
ibCfg.ibOffsetAddr = (uint32_t)pcieConvert_CoreLocal2GlobalAddr ((uint32_t)dstBuf.buf);//0x80000000;//
ibCfg.region = PCIE_IB_REGION_M;
using this configure ,i thought i should find the data transfered from fpga in the 0x10800000 part ,but i still find it in the 0x00800000 part
?why ? also, if i name the offset as 0x80000000, i cannot find the data in the ddr3.
i know the offset is not a 32bit data, but which fields are the actually offset address used ?
and is my configure of the inbound translation right?(although i can receive the data successfully)
2. MSI (multi message)
I've check some old posts about this, but they are all between dsps.
i want to use two message events, one for dsp to trigger a dma (fpga write to dsp ), one for dsp to know the completion of dma.
what should i do?
now, this is the situation:
i configure the bar0 in DSP(rc) as base address (0x70000000) .
In the FPGA side ,it has such a function, which will send a message after the dma, i configure the MSI_DATA to 0x00000000,and low address to 0x70000054( so the fpga will send a pcie packet with its address set as 0x70000054).
actually, i've kind of receive this interrupt. But i don't quite get what i want and i 've some questions about this:
a. can I succeed to send two interrupts to dsp and how will i handle this?
i know the msi interrupt event number is 17 in the primary interrupt event table, do the 32 msi events share this ?and i can only have one hwi isr for it? how can do different things to different event?
b. I learned that to trigger a msi interrupt , i should write data to the MSI_IRQ in RC, what's the detail?
as we know that we have 8 MSI_IRQ_STATUS and MSI_IRQ_ENABLE_SET registers , as i break in the hwi_isr, i will see the MSI0_IRQ_STATUS become 1 but i see nothing changed in the MSI_IRQ and IRQ_EOI during the full process including interrupt status clearing.
I was trying to add a MSI1 event to trigger the dma start, I've enable the multi_message_enable field , set the MSI1_IRQ_ENABLE_SET , it seems we enter the hwi ( and i move the dma in hwi,which will trigger the dma again at the end), but i see nothing changing in the MSI1_IRQ_STATUS, the MSI_IRQ does not change too.
c. cfg file, anything to focus on?
this is my hwi configure in the cfg file following the old posts
var PCIeMSI_HwiParams = new Hwi.Params();
PCIeMSI_HwiParams.instance.name = "PCIeMSI_Hwi";
PCIeMSI_HwiParams.arg = 1;
PCIeMSI_HwiParams.enableInt = false;
PCIeMSI_HwiParams.eventId = 17;
PCIeMSI_HwiParams.priority = 4;
Program.global.PCIeMSI_Hwi = Hwi.create(5, "&hwi_isr", PCIeMSI_HwiParams);
d. because i don't see much multiple message interrupt example, i want to have some details on this , i'm not sure you can understand what i say quite well, because i
am puzzled myself. anyting to add or make clear of my deomonstration, please let me know!
and I will appriciate if anyone can help me on this!