I need to reset the network periphery for subsequent re-initialization, without losing the data in the DDR.
I use the following boot order:
1. I2C loader performs pll_bootfix, activates powerdomain(3) and passes control to the address 0x70000000
2. In the NOR-flash at 070000000 located a secondary boot loader, which configures the entire periphery (PLL, DDR, PA, etc.)
For soft reset i use following code:
{
RSTCTL_REG = 0x15a69;
rst = RSTCFG_REG;
CSL_FINS (rst, PLLC_RSTCFG_PLLCTLRSTTYPE, 1);
RSTCFG_REG =rst;
RSTCTL_REG = 0x05a69; // activate reset key
RSTCTL_REG = 0x0; // and reset
}
From reset to reset the behavior of the DSP varies:
- Sometimes mainpll reset to bypass, and sometimes stays tuned in pll-mode at 1 GHz
- Sometimes powerdomains 3+ remain on, and sometimes off
In addition, the use of TI pllfix code resets all of the plls, including DDR, which leads to loss of data.
What is the correct initialization sequence after a soft reset to save the data in the DDR?