Hi Team,
Our customer is using LMH1983 in their application, facing the issue below.
There are TRS and CRC errors when customer outputs 1080/p/50, 720p/50 using the LMH1983 PLL2 CLK output 148.5MHz at FREERUN mode(No input). The error count seemed to increase once in about every 20 seconds.
These error dissapears with either of the following settings.
A) Change to GENLOCK mode with F,V,H input. After this, even if you set back to FREERUN mode there is no more error.
B) Change ADR 0x12 bit[5:4] TOF2_Align_Mode from ALWAYS ALIGN(=10) to NEVER ALIGN(=11)
Customer will use GENLOCK and FREERUN mode in their system.
[Question]
Q1)
What is the recommended register settings of alignment mode for each GENLOCK and FREERUN mode ? If there is a recomended register table, we appreciate if we could have them, for each GENLOCK and FREERUN mode.
Q2)
I have attached current register setting which are changed from default. Could you please review and give us your advice ?
Q3)
I think that using in ALWAYS ALIGN mode for TOF1/2/3 is not recommended for each mode as it would lead to phase jump. Am I correct ?
Q4)
If there is an register programming sequence, please let us know.
Best Regards,
Kawai