Part Number:TMS320C6678
Hi all,
I am working on a board with C6678 DSP and Marvell Alaska 88E1322 Gigabit Ethernet PHY over SGMII. My device uses one of MAC port (Port 2) in second stage bootloader mode and another one (Port 1) after application started. When Port 2 has a link, the program is never loaded by design. In typical configuration Port 1 is always connected to PC and Port 2 is left not connected.
I have noticed a problem when my device is negotiating with "100Mbps only" PC/Switch on the other side of cable. Bootloader works fine, but the application randomly fails to get communication. Link is active and auto-negotiated. ARP packets arrive to DSP and DSP responds, but they never get through internal DSP's switch.
Bootloader and the application has same Ethernet initialization code, but configures different Ethernet port.
Unplugging Port 1 and plugging again when application is working solves communication problem, but this is not a solution for me.
- Compiler: TI v7.4.4 (ELF)
- XDC: 3.25.2.70
- IPC: 3.23.1.03
- NDK: 2.22.3.20
- SYS/BIOS: 6.35.1.29
Example of statistics got from DSP's switch:
Switch statistics: | Host: | MAC Ports: |
Rx good frames: | 95 | 655 |
Rx b-cast frames: | 1 | 440 |
Rx undersized: | 0 | 0 |
Rx CRC error: | 0 | 0 |
Rx DMA overrun: | 0 | 0 |
Tx good frames: | 655 | 0 |
Tx b-cast frames: | 440 | 0 |
Tx underrun: | 0 | 0 |
Is there any bug in Silicon or libraries I do not know about but is related to my problem?
Best regards,
Jack