In a new project I need to use the MSP430FG6638 BGA version.
In this version I need to MAP SPI to port 2.
http://www.ti.com/lit/ds/symlink/msp430f6638.pdf
In the Mixed Signal Microcontroller datasheet for the MSP430F663x page 11 I get the information that:
P2.0 is USCI_B0 SPI STE (Clock)
P2.1 is UCB0SIMO (Master Data out)
P2.2 is UCB0SOMI (Master Data In)
But, then I look at the example code MSP430F66XX_USCI0_SPI_09.C I get really confused.
Sample code uses UCA0 on port 2, and
P2.1 UCB0SOMI (Master Data In)
P2.2 UCB0SIMO (Master Data Out)
Can somebody inform what’s right and wrong.
Is this sample code confirmed as running?
Regards
Steffen kristensen
// Note that UCB0CLK, UCB0SIMO and UCB0SOMI need to be assigned pins via the
// PMAP controller.
//
// MSP430F66x
// -----------------
// /|\| |
// | | |
// --|RST P1.0|-> LED
// | |
// | P2.2|-> Data Out (UCA0SIMO)
// | |
// | P2.1|<- Data In (UCA0SOMI)
// | |
//Slave SPI reset <-|P1.1 P2.0|-> Serial Clock Out (UCA0CLK)
//
//
// Priya Thanigai
// Texas Instruments Inc.
// Nov 2009
// Built with IAR Embedded Workbench Version: 4.20 & Code Composer Studio V4.0
//******************************************************************************