Could someone please help me answer the following question?

We're working with a pci device based on DSP TMS320C6455, which is as a slave device connect to a X86 PCI host. According the datasheet, I found there are 2 descriptions about pci configuration done:

1. CFGDONE bit in register PCICFGDONE, which means dsp rom code finish pci auto initialization.

2. CFGDONE bit in register PCISLVCTRL, which has similar description with PCICFGDONE .

I write some code to test when these 2 CFGDONE  signal assert and I found:

1. PCICFGDONE:CFGDONE become assert(1) before my test code running, I think this is correct and as expected.

2. PCISLVCTRL:CFGDONE become assert(1) after my test code running, and interesting that after a several microseconds( maybe milliseconds), it turn to  deassert(0), and then turn to assert(1) again,

this result is out of my expectation, so I want to know what's the real meaning of PCISLVCTRL:CFGDONE, and why it become jitter after device powerup?

In my opinion, all pci initialization code should after PCISLVCTRL:CFGDONE become stable, is that right?

Hope your early reply, many Thanks!