Hello,
I am trying to check the MIBSPI and DMA function on TMS570LS3137 device.
On my board MIBSPI1, two slaves are connected.
And my RTOS generates two periodic tasks (1ms task and 10ms task).
Now, I would like to carry out SPI communication with SLAVE1 by 1ms task,
andwith SLAVE2 by 10ms task.
Furthermore, in order to reduce the overhead of CPU,
I would like to use RX DMA and TX DMA with MIBSPI1.
The conditions of MIBSPI1 communication are as follows.
"MASTER(TMS570) <-> SLAVE1"
- Communication cycle : 1ms (SPI is triggered by 1ms task)
- The number of data transmission at 1 cycle : 1 to 100 words.
(The number is variable and it may change for every cycle. It is decided in the 1ms task).
- Word length : 32bits
- Baudrate : 5MHz
- Chip select : CS_0
"MASTER(TMS570) <-> SLAVE2"
- Communication cycle : 10ms (SPI is triggered by 10ms task)
- The number of data transmission at 1 cycle : 1 to 100 words.
(The number is variable and it may change for every cycle. It is decided in the 10ms task).
- Chip select : CS_1
Others are the same conditions as SLAVE1.
The priority of SLAVE1 is higher than SLAVE2, and the communication with SLAVE2 can be interrupted
by the communication with SLAVE1.
I think there are three points which make the problem not easy.
1. The number of data transmission is variable for every cycle.
2. In the worst case, the send data size is over MIBRAM size.
(There are 128 buffers in MIBRAM, and one buffer can contain 16bits data for each of transmit and receive.
so MIBRAM can contain up to 2048 bits transmit/receive data .
However, I would like to send 3200 bits (32-bit * 100-word) data in the case of maximum transmission. )
3. Cooperation with TX/RX DMA.
Could you please tell me how it can be resolved?