TMS570 SCI DMA Tx

Hello,

I have to transmit data between two TMS570LS3137 via SCI. I decided to use DMA to decrease CPU load.

Therefore I want to trigger the DMA tx request by SW.

My question is, how can I trigger it or in other words, which bit do I have to set, to trigger a SCI DMA transmission.

Here is my init code, maybe I have forgotten something important:

SCI2Init();    // contains SET_TX_DMA enable

// bring DMA out of reset
    DMAGCTRL_bit.DMA_RES = 1U;
    
    // init Control-Packets
    DMA_CPClear();
    
    // activate DMA
    DMAGCTRL_bit.DMA_EN = 1U;
    DMAGCTRL_bit.DEBUG_MODE = 0x03;
    
    
    DMACP0ISADDR = (unsigned int)&dataArray;            /* SRCADDR  is the MIBSPI3 RX Buffer        */
    DMACP0IDADDR = (unsigned int)&SCI2TD;                /* DSTADDR  is the address of dataArray     */
    DMACP0ITCOUNT_bit.IFTCOUNT = 1;                        /* FRM_CNT  1 Frame transfer                */
    DMACP0ITCOUNT_bit.IETCOUNT = 27;            /* 27 Elements per Frame                    */
    DMACP0CHCTRL_bit.RES = ACCESS_8_BIT;                /* RD_SIZE  Size of source element          */
    DMACP0CHCTRL_bit.WES = ACCESS_8_BIT;                  /* WR_SIZE  Size of destination element     */
    DMACP0CHCTRL_bit.TTYPE = FRAME_TRANSFER;            /* TRANSFER_TYPE                            */
    DMACP0CHCTRL_bit.ADDMR = ADDR_FIXED;    //ADDR_INC1;                    /* RD_ADDR_MODE Auto increment src (read)   */
    DMACP0CHCTRL_bit.ADDMW = ADDR_FIXED;
    DMACP0CHCTRL_bit.AIM = AUTOINIT_OFF;                 /* AUTOINIT Disable                         */
    DMACP0EIOFF_bit.EIDXD = 0;                            /* ELM_DST_OFFST (for Index mode)           */
    DMACP0EIOFF_bit.EIDXS = 0;                             /* ELM_SRC_OFFST (for Index mode)           */
    DMACP0FIOFF_bit.EIDXD = 0;                            /* FRM_DST_OFFST (for Index mode)           */
    DMACP0FIOFF_bit.EIDXS = 0;                            /* FRM_SRC_OFFST (for Index mode)           */
    DMACP0CHCTRL_bit.CHAIN = 0;        /* channel Ctrl info by default NO Channing is Enabled.*/
    
    
    DMAPAR0_bit.CH0PA = PORTB;
    
    
    //Bypass FIFO
    DMAPTCRL_bit.BYB = 1U;
    
    
    //Configuring the DMA Request Register
    //i.e Mapping the DMA Channel request to DMA Channel
    DMADREQASI0_bit.CH0ASI = 31;
    
    //Enable Trigger for Channel 0
    DMAHWCHENAS_bit.HWCHENA0 = 1U;

Thanks in advance,

Fuchs Dominik