OMAPL138 and uPP interface

Dear TI Customer Service,

We are currently using OMAPL138 and test uPP interface on CCS5 OK, but it doesn’t work on DSPLINK.
Here are couple of approaches we take, and we are puzzled as to why this does not work...

1. Work on uPP DSP/BIOS driver

I tested the uPP DSP/BIOS driver on CCS 5, when the code runs on internal RAM - everything is ok.
It can receive data, entry interrupt function, and so on.

I edit .tcf, and transfer the driver on the DSPLINK. The DSPLINK’s tcf file confused me.
The DSPLINK’s tcf file is different from uPP driver’s tcf file.

I added this code to DSPLINK’s tcf file:
bios.UDEV.create("UPP");
bios.UDEV.instance("UPP").fxnTableType = "IOM_Fxns";
bios.UDEV.instance("UPP").comment = "uPP IOM mini driver";
bios.UDEV.instance("UPP").initFxn = prog.extern("UPP_INIT");
bios.UDEV.instance("UPP").fxnTable = prog.extern("UPP_FXN_TABLE");
bios.UDEV.instance("UPP").params = prog.extern("UPP_DEV_CONFIG");
bios.ECM.ENABLE = 1;
bios.HWI.instance("HWI_INT7").interruptSelectNumber = 2;

It can compile and run correctly but no interrupt works. (can’t entry interrupt function).

By the way I check the DSP interrupt map on ”OMAP-L138 DSP+ARM Processor Technical Reference Manual page 99”, the uPP interrupt num is 94, but the driver use num is 2.
I don’t know why the difference?

2. Use uPP without DSP/BIOS

I found uPP demo from LOGIC PD. It use uPP interface without DSP/BIOS. It also runs ok on CCS5.

//UPCTL
config.UPCTL.value=0;
config.UPCTL.bits.MODE = 0; //All receive mode
config.UPCTL.bits.CHN = 0; //Single channel mode. Only Channel A is active
config.UPCTL.bits.DRA = 0; //Single data rate
config.UPCTL.bits.IWA = 1; //16-bit interface
config.UPCTL.bits.DPWA = 2; //10-bit data fomat
config.UPCTL.bits.DPFA = 1; //Right-justified, sign extended

//UPICR
config.UPICR.value=0;
config.UPICR.bits.STARTA = 0; //START signal is enabled
config.UPICR.bits.ENAA = 1; //ENABLE signal is enabled
config.UPICR.bits.WAITA = 1; //WAIT signal is enabled
config.UPICR.bits.TRISA = 1; //Channel A data pins are in a high-impedance state while idle

//UPIVR
config.UPIVR.value=0;

//UPTCR
config.UPTCR.value=0; //all values 0 for 64byte DMA bursts read / write

//UPDLB
config.UPDLB.value=0; //no loopback

//UPIES
config.UPIES.value=0; //
config.UPIES.bits.EOLI = 0; // enable EOL
config.UPIES.bits.EOWI = 1; // enable EOW

//UPPCR
config.UPPCR.value = 0;
config.UPPCR.bits.EN = 1; //enable uPP
config.UPPCR.bits.RTEMU = 1; //allow emulator use
config.UPPCR.bits.SOFT = 1; //allow emulation
UPP_init(&config);

Using this code read data from uPP:
UPP->UPID0 = (uint32_t)&rev_buffer;//add next DMA transfer
UPP->UPID1 = 0x00010080; //1 lines 128 bytes per line
UPP->UPID2 = 0x00000080; //no offset between lines
while(UPIS2r->bits.PEND == 1){};

I didn’t use interrupt so I use polling.

while(UPP->UPIER == 0){};
UPP->UPIER = 0x08;
UPP->UPEOI = 0x0;

It works on CCS5 is ok. I transfer it through DSPLINK.
During the first attempt it can receive data, however, after the first time data remains unchanged unless DSPLINK reloads the DSP program.

Can you please supply us with uPP demo on DSPLINK, so that we can see how it works?
Can you supply a DSPLINK’s memory map file, so that we can let DSPLINK run on internal RAM?