I have implemented a circuit with a virtex5 and an lmh0050. I cannot get the part to lock. I've checked all the obvious things. Clock is at 74.25Mhz coming from the FPGA, part is not in reset, power looks good. Any suggestions?
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I have implemented a circuit with a virtex5 and an lmh0050. I cannot get the part to lock. I've checked all the obvious things. Clock is at 74.25Mhz coming from the FPGA, part is not in reset, power looks good. Any suggestions?