We have a query on NOR flash supported by GPMC of DM816x processor. Under the section 25.7.2 XIP Memory of the TRM (Literature Number: SPRUGX8B March 2013), it says that “Can connect up to 1 Gbit (128 Mbytes) memories”. Also we see that each GPMC chip select can support up to 256 MB of memory.
Based on the above observation we have few queries,
- Is this 128 MB limitation mentioned under section 25.7.2 is due to RBL limitation?
- If this limitation is due to RBL, then is this limitation of 128 MB applicable even if we interface a SPI EEPROM/Flash for booting