Part Number: TMS320F28335
Team,
Could you help with the below?
We are seeing ADC conversion errors (more than 130 LSB) despite that auto calibration is done during the ADC initialization.
Any ideas?
See below the code snippet.
// ADC calibration
EALLOW;
SysCtrlRegs.PCLKCR0.bit.ADCENCLK=1;
(*ADC_Cal) ();
SysCtrlRegs.PCLKCR0.bit.ADCENCLK=0;
EDIS;
/*
* Configuration ADC, mode SEQ
*/
EALLOW;
#define ADC_MODCLK 0x3 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3) = 25.0 MHz
SysCtrlRegs.HISPCP.all = ADC_MODCLK; // HSPCLK = SYSCLKOUT/ADC_MODCLK
SysCtrlRegs.PCLKCR0.bit.ADCENCLK = 1;
EDIS;
AdcRegs.ADCREFSEL.all = 0; // Internal reference
AdcRegs.ADCTRL3.all = 0x00E0; // Power up reference/ADC circuits/sequential sampling
DELAY_US(5000L);
AdcRegs.ADCMAXCONV.all = 12; // 13 analogue channels
AdcRegs.ADCTRL1.bit.SEQ_CASC = 1; // mode cascade SEQ 16
AdcRegs.ADCTRL1.bit.ACQ_PS = 15;
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x8; // ADCINB0
AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x9; // ADCINB1
AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 0xa; // ADCINB2
AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 0xb; // ADCINB3
AdcRegs.ADCCHSELSEQ2.bit.CONV04 = 0xc; // ADCINB4
AdcRegs.ADCCHSELSEQ2.bit.CONV05 = 0x0; // ADCINA0
AdcRegs.ADCCHSELSEQ2.bit.CONV06 = 0x1; // ADCINA1
AdcRegs.ADCCHSELSEQ2.bit.CONV07 = 0x2; // ADCINA2
AdcRegs.ADCCHSELSEQ3.bit.CONV08 = 0x3; // ADCINA3
AdcRegs.ADCCHSELSEQ3.bit.CONV09 = 0x4; // ADCINA4
AdcRegs.ADCCHSELSEQ3.bit.CONV10 = 0x5; // ADCINA5
AdcRegs.ADCCHSELSEQ3.bit.CONV11 = 0x6; // ADCINA6
AdcRegs.ADCCHSELSEQ4.bit.CONV12 = 0x7; // ADCINA7
AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1; // ePWM4
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; //
AdcRegs.ADCTRL2.bit.INT_MOD_SEQ1 = 0; //