Problem with MDIO link status register on C6678 EVM board

Good morning,

i initialized the MDIO module as simple as:

  CSL_MDIO_enablePreamble();
  CSL_MDIO_setClkDivVal(165);
  // Enable the MDIO
  CSL_MDIO_enableStateMachine();

(cpu runs on 1 GHz, so the MDIO should run at approx. 1MHz)

when I now poll the link status register continuously with

CSL_MDIO_isPhyLinked (1)

i get a reliable "0" if the link is down, and an unreliable 1 if the link is up.

unreliable means during a link up condition, i get about 5% "0" out of the link status register. So my question is, what is going wrong there?

any ideas/hints for me?

thanks

jochen