Part Number: TMS570LC4357
Hello,
I'm currently using CAN 2 and 3 in GIO mode and using HALCoGen 04.07.01 to configure the pins.
- I have enabled CAN 2 and CAN 3 drivers.
- Looked for differences between CAN2 and CAN 3 port initialization in each tab.
- No interrupts or active message boxes in each Msg tab
- No interrupt VIM channels selected
In the HCG generated file HL_can.c in the function canInit():
For CAN 2 only the CTL, TIOC and RIOC registers are modified, which is what I would expect. However the initialization of CAN 3 is configuring all other registers including TIOC and RIOC. The configuration ultimately ends with an instruction to leave initialization mode.
/** - Leave configuration and initialization mode */
canREG3->CTL &= ~(uint32)(0x00000041U);This call unfortunately resets the GIO settings.
My questions are:
- Is there a checkbox I'm possibly missing in the HCG configuration which differs between CAN2 and CAN3 to cause the HALCoGen generated initialization to differ?
- Is the only option to reinitialize the TIOC and RIOC registers in the USER CODE 5 section?
Thanks for your time.
void canInit(void)
{
/* USER CODE BEGIN (4) */
/* USER CODE END */
/** @b Initialize @b CAN2: */
/** - Setup control register
* - Enter initialization mode
*/
canREG2->CTL = 0x00000001U;
/** - CAN2 Port output values */
canREG2->TIOC = (uint32)((uint32)0U << 18U )
| (uint32)((uint32)0U << 17U )
| (uint32)((uint32)0U << 16U )
| (uint32)((uint32)0U << 3U )
| (uint32)((uint32)1U << 2U )
| (uint32)((uint32)0U << 1U );
canREG2->RIOC = (uint32)((uint32)0U << 18U )
| (uint32)((uint32)0U << 17U )
| (uint32)((uint32)0U << 16U )
| (uint32)((uint32)0U << 3U )
| (uint32)((uint32)1U << 2U )
| (uint32)((uint32)0U <<1U );
/** @b Initialize @b CAN3: */
/** - Setup control register
* - Disable automatic wakeup on bus activity
* - Local power down mode disabled
* - Disable DMA request lines
* - Enable global Interrupt Line 0 and 1
* - Disable debug mode
* - Release from software reset
* - Enable/Disable parity or ECC
* - Enable/Disable auto bus on timer
* - Setup message completion before entering debug state
* - Setup normal operation mode
* - Request write access to the configuration registers
* - Setup automatic retransmission of messages
* - Disable error interrupts
* - Disable status interrupts
* - Enter initialization mode
*/
canREG3->CTL = (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)((uint32)0x00000005U << 10U)
| 0x00020043U;
/** - Clear all pending error flags and reset current status */
canREG3->ES |= 0xFFFFFFFFU;
/** - Assign interrupt level for messages */
canREG3->INTMUXx[0U] = (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U;
canREG3->INTMUXx[1U] = (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U
| (uint32)0x00000000U;
/** - Setup auto bus on timer period */
canREG3->ABOTR = (uint32)0U;
/** - Setup IF1 for data transmission
* - Wait until IF1 is ready for use
* - Set IF1 control byte
*/
/*SAFETYMCUSW 28 D MR:NA <APPROVED> "Potentially infinite loop found - Hardware Status check for execution sequence" */
while ((canREG3->IF1STAT & 0x80U) ==0x80U)
{
} /* Wait */
canREG3->IF1CMD = 0x87U;
/** - Setup IF2 for reading data
* - Wait until IF1 is ready for use
* - Set IF1 control byte
*/
/*SAFETYMCUSW 28 D MR:NA <APPROVED> "Potentially infinite loop found - Hardware Status check for execution sequence" */
while ((canREG3->IF2STAT & 0x80U) ==0x80U)
{
} /* Wait */
canREG3->IF2CMD = 0x17U;
/** - Setup bit timing
* - Setup baud rate prescaler extension
* - Setup TSeg2
* - Setup TSeg1
* - Setup sample jump width
* - Setup baud rate prescaler
*/
canREG3->BTR = (uint32)((uint32)0U << 16U) |
(uint32)((uint32)(4U - 1U) << 12U) |
(uint32)((uint32)((6U + 4U) - 1U) << 8U) |
(uint32)((uint32)(4U - 1U) << 6U) |
(uint32)(uint32)9U;
/** - CAN3 Port output values */
canREG3->TIOC = (uint32)((uint32)1U << 18U )
| (uint32)((uint32)0U << 17U )
| (uint32)((uint32)0U << 16U )
| (uint32)((uint32)0U << 3U )
| (uint32)((uint32)1U << 2U )
| (uint32)((uint32)1U << 1U );
canREG3->RIOC = (uint32)((uint32)0U << 18U )
| (uint32)((uint32)0U << 17U )
| (uint32)((uint32)0U << 16U )
| (uint32)((uint32)0U << 3U )
| (uint32)((uint32)1U << 2U )
| (uint32)((uint32)0U << 1U );
/** - Leave configuration and initialization mode */
canREG3->CTL &= ~(uint32)(0x00000041U);
/** @note This function has to be called before the driver can be used.\n
* This function has to be executed in privileged mode.\n
*/
/* USER CODE BEGIN (5) */
}