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AWR1243: external clock

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Part Number: AWR1243

Hello team,

I have the following questions:

1. Can external PLL/VCO be used instead embedded 20 GHz PLL synthesizer? The AWR1243 on-chip synth. has very poor phase noise performance. Anyway, in cascaded application only one PLL synth work, while other just sleep. So, why not to use external high-quality chirp modulated PLL source with sync signal for all chips? If necessary, the same 40 MHz clock may be used as clock for the external PLL and AWR1243.

2. Can we recommend a high quality GaAs mmW LNAs between receive antennas and receiver inputs of the AWR1243? The 15dB noise figure for AWR1243 is high compared to some external devices with 3.6 dB. What max RF input level to avoid the AWR1243’s LNA being broken?

3. For multichip mmW cascading much easy to use separate chips on transmit and receive. It allows flexible separation and better isolation of the transmit and receive antennas arrays. Can we use the AWR1243 in receive or transmit mode only, by disabling excessive function to save the power?  

4. For MMWAVCAS-RF-EVM eval. board with four AWR1243P. How much the RF feed losses are? 

Thanks!

Errol


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