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LM3481: Inconsistent evaluation board schematics for UVLO

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Part Number: LM3481

Hello,

I am using the LM3481 as a SEPIC with input voltage 9-100V and output voltage of 48V. I have a separate 12V supply to the chip. The UVLO is connected with a resistor ladder to Vin (9-100V).

I am currently designing the UVLO resistor divider.

I am therefore looking at the AN-2094 SEPIC evaluation board in which you have input voltage up to 25V.

Using the formulas in the DS for determining the UVLO resistors R8 and R7 and looking at the schematic on page 7 (figure 3) of AN-2094 which has R8= 20,5kOhm and R7=40,2kOhm,, it seems like the voltage at UVLO @ 25V input will be 8,44V which is more than the absolute max for that pin. 

Did I misunderstand the DS max voltage of 6V or is there a mistake by TI in the schematics of the evaluation board?


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